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E2D0025-27-42 Semiconductor
Semiconductor MSM6588/6588L
ADPCM Solid-State Recorder (for Serial Registers)
This version: Jan. 1998 MSM6588/6588L Previous version: May. 1997
GENERAL DESCRIPTION
The MSM6588/6588L is a "solid-state recorder" IC developed using the ADPCM method. By externally connecting a microphone, a speaker, a speaker amplifier and a serial register or other Memory device to store ADPCM data, it can record and playback voice data similar to a tape recorder. The MSM6588/6588L has a stand-alone mode and a microcontroller interface mode. In standalone mode, record/playback can be selected from a pin and it is possible to control the MSM6588 by a simple drive timing. In microcontroller interface mode, record/playback can be controlled by commands from the microcontroller in microcontroller mode, the MSM6588/6588L is much more flexible than in stand-alone operation. In addition, recording and playback with fixed message are easily implemented by connecting a serial voice ROM. The MSM6588 and the MSM6588L support 5 V and 3 V operation respectively.
FEATURES
* 12bit A/D converter * 12bit D/A converter * Microphone amplifier * Low-pass filter (LPF) Filter characteristics -40 dB/oct * Serial registers MSM6588 Up to four 1Mbit serial registers (MSM6685) can be driven directly One 512Kbit serial register (MSM6587) can be driven directly One 256Kbit serial register (MSM6586) can be driven directly MSM6588L Up to four 1Mbit serial registers (MSM63V89C) can be driven directly * Serial Voice ROMs 1Mbit serial voice ROM (MSM6595A-xxx) 2Mbit serial voice ROM (MSM6596A-xxx) 3Mbit serial voice ROM (MSM6597A-xxx) * Maximum recording time 262 seconds (when using 3-bit ADPCM, 5.3 kHz sampling) * Voice triggered starting * Pause function * Master clock frequency: 4.096 MHz to 8.192 MHz * Power supply voltage MSM6588: Single 5 V Power supply MSM6588L: Single 3 V Power supply * Package options: 44-pin plastic QFP (QFP44-P-910-0.80-2K)(Product name: MSM6588GS-2K) 44-pin plastic QFP (QFP44-P-910-0.80-2K)(Product name: MSM6588LGS-2K) 44-pin plastic TQFP (TQFP44-P-1010-0.80-K)(Product name: MSM6588LTS-K)
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Semiconductor * Differences between MSM6588 and MSM6588L
MSM6588/6588L
The major differences between the MSM6588 and the MSM6588L are shown below.
Parameter Operating voltage Full scale of A/D and D/A converters Voice detection level for voice triggered starting External only register MSM6588 3.5 to 5.5V 0 to VDD VDD , VDD , VDD 64 32 16 1Mbits (MSM6389C) 512Kbits (MSM6587) 256Kbits (MSM6586) 1Mbits (MSM63V89C) MSM6588L 2.7 to 3.6V 3 1 VDD VDD to 4 4 VDD , VDD , VDD 128 64 32
1. Characteristics in stand-alone mode * 3-bit ADPCM *Sampling frequency: 5.3 kHz or 8.0 kHz (when the oscillator operates at 4.096 MHz) 10.6 kHz or 16.0 kHz (when the oscillator operates at 8.192 MHz) * Number of phrases: 1, 2, 4 or 8 2. Characteristics in microcontroller interface mode * 3-bit/4-bit ADPCM selectable * Sampling frequency: 4.0 kHz, 5.3 kHz, 6.4 kHz or 8.0 kHz (when the oscillator operates at 4.096 MHz) 8.0 kHz, 10.6 kHz, 12.8 kHz or 16.0 kHz (when the oscillator operates at 8.192 MHz) * Condition setting, start, and stop of record/playback controllable by 13 commands.
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CONTENTS
GENERAL DESCRIPTION ................................................................................................................................... 1 FEATURES .............................................................................................................................................................. 1 BLOCK DIAGRAM ................................................................................................................................................ 6 Stand-Alone Mode ....................................................................................................................................... 6 Microcontroller Interface Mode ................................................................................................................. 7 PIN CONFIGURATION (Top View) ................................................................................................................... 8 1. Stand-alone mode (MCUM pin="L") ............................................................................................... 8 2. Microcontroller interface (MCUM pin="H") .................................................................................. 9 PIN DESCRIPTIONS ............................................................................................................................................ 10 Common Functions in Stand-Alone Mode and Microcontroller Interface Mode ............................. 10 Stand-Alone Mode ..................................................................................................................................... 12 Microcontroller Interface Mode ............................................................................................................... 13 ABSOLUTE MAXIMUM RATINGS (for MSM6588 (5V Version)) ............................................................... 14 RECOMMENDED OPERATING CONDITIONS (for MSM6588 (5V Version)) ......................................... 14 ELECTRICAL CHARACTERISTICS (for MSM6588 (5V Version)) ............................................................... 14 DC Characteristics ...................................................................................................................................... 14 Analog Characteristics ............................................................................................................................... 15 AC Characteristics ...................................................................................................................................... 15 1. Common characteristics in stand-alone mode and microcontroller interface mode ....................................................................................................... 15 2. Stand-alone mode .............................................................................................................................. 16 3. Microcontroller interface mode ....................................................................................................... 17 ABSOLUTE MAXIMUM RATINGS (for MSM6588L (3V Version)) ............................................................. 19 RECOMMENDED OPERATING CONDITIONS (for MSM6588L (3V Version)) ....................................... 19 ELECTRICAL CHARACTERISTICS (for MSM6588L (3V Version)) ............................................................ 19 DC Characteristics ...................................................................................................................................... 19 Analog Characteristics ............................................................................................................................... 20 AC Characteristics ...................................................................................................................................... 20 1. Common characteristics in stand-alone mode and microcontroller interface mode ....................................................................................................... 20 2. Stand-alone mode .............................................................................................................................. 21 3. Microcontroller interface mode ....................................................................................................... 22 TIMING DIAGRAMS .......................................................................................................................................... 24 Reset Function and Power Down Function ............................................................................................ 24 1. Stand-alone mode when the PDMD pin is "L" ............................................................................. 24 2. Stand-alone mode when the PDMD pin is "H" and in microcontroller interface mode ................................................................................................... 24 Stand-alone Mode ....................................................................................................................................... 25 1. Timing during recording (PDMD pin="L", VDS pin="L") ........................................................ 25
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MSM6588/6588L
Timing during recording by voice triggered starting (PDMD pin="L", VDS pin="H") ..................................................................................................... 25 3. Timing during playback (PDMD pin="L") ................................................................................... 26 4. Timing during repeated playback (PDMD pin="L") ................................................................... 26 5. Timing during recording (PDMD pin="H", VDS pin="L") ....................................................... 27 6. Timing during recording by voice triggered starting (PDMD pin="H", VDS="H") ........................................................................................................... 27 7. Timing during playback (PDMD pin="H") .................................................................................. 28 8. Timing during repeated playback (PDMD pin="H") .................................................................. 28 9. Timing of pause in record/playback .............................................................................................. 29 Microcontroller Interface ........................................................................................................................... 30 1. Data read (RD pulse) ......................................................................................................................... 30 2. Data write (WR pulse) ....................................................................................................................... 30 3. Input method of 1 nibble command (NOP, PAUSE, PLAY, REC, START and STOP commands) ....................................................... 31 4. Input method of 2 nibble command (SAMP, CHAN and VDS commands) ............................................................................................ 31 5. Input method of ADRWR command .............................................................................................. 32 6. Input method of ADRRD command ............................................................................................... 32 7. Recording method by START command ....................................................................................... 33 8. Timing of voice triggered starting ................................................................................................... 33 9. Playback method using START command .................................................................................... 34 10. Timing of pause in record/playback using PAUSE command .................................................. 34 11. Timing of data transfer by DTRW command ................................................................................ 35 12. Timing of recording by EXT command .......................................................................................... 35 13. Timing of playback by EXT command ........................................................................................... 36 FUNCTIONAL DESCRIPTION .......................................................................................................................... 37 Recording Time and Memory Capacity .................................................................................................. 37 Analog Input Amplifier Circuit ................................................................................................................ 37 Connection of LPF Circuit Peripherals .................................................................................................... 38 LPF Characteristics ..................................................................................................................................... 40 Full Scale of A/D and D/A Converters .................................................................................................. 40 Voice Triggered Starting ............................................................................................................................ 41 How to Connect an Oscillator .................................................................................................................. 42 How to Connect Power Supply ................................................................................................................ 44 Data Configuration of External Serial Registers .................................................................................... 44 1. Channel index area ............................................................................................................................ 45 2. Voice (ADPCM) data area ................................................................................................................ 46 Selection of Serial Registers ....................................................................................................................... 47 Recording Control Modes ......................................................................................................................... 47 1. Direct mode ........................................................................................................................................ 47 2. Fixed mode ......................................................................................................................................... 47 3. Flex mode ............................................................................................................................................ 48 Channel Usage ............................................................................................................................................ 49 1. Selection of a channel in direct mode and flex mode ................................................................... 49 2. Channel selection in fixed mode ..................................................................................................... 49
2
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Operation in Stand-alone Mode ............................................................................................................... 51 1. Power down function ........................................................................................................................ 51 2. Master clock frequency and sampling frequency ......................................................................... 51 3. Method of recording ......................................................................................................................... 52 4. Method of playback ........................................................................................................................... 53 5. Method of pause in record/playback ............................................................................................. 54 6. Operation in voice triggered starting ............................................................................................. 55 7. Method of re-recording ..................................................................................................................... 56 8. Pull-up resistor ................................................................................................................................... 57 Operation in Microcontroller Interface Mode ........................................................................................ 58 1. Command input method .................................................................................................................. 58 2. Explanation of commands ................................................................................................................ 61 3. Explanation of status register .......................................................................................................... 63 4. Selection of sampling frequency (SAMP command) .................................................................... 65 5. Recording control modes (SAMP and CHAN commands) ......................................................... 65 6. Selection of channel (CHAN command) ........................................................................................ 66 7. Input/output of start address and stop address (ADRWR and ADRRD commands) ................................................................................................ 67 8. Specifying ADPCM bit length (VDS command) ........................................................................... 71 9. Specifying voice triggered starting mode (VDS command) ........................................................ 71 10. Recording method ............................................................................................................................. 71 11. Playback method ............................................................................................................................... 75 12. Pause method (temporary suspension) with the (PAUSE command) ....................................... 77 13. Operation in voice triggered starting (VDS command) ............................................................... 79 14. Address control operation ................................................................................................................ 80 15. Multi-channel record/playback method ........................................................................................ 84 16. Playback method by means of a serial voice ROM ....................................................................... 87 17. Data transfer method with external serial registers (DTRW command) ................................... 91 18. Method of record/playback by input/output of data from the data bus (EXT command) ........................................................................................................... 93 19. Reset and power down function ..................................................................................................... 96 APPLICATION CIRCUITS ................................................................................................................................. 97
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Semiconductor
Stand-Alone Mode
BLOCK DIAGRAM
RSEL1 RSEL2 CSEL1 CSEL2 CA1 CA2 CA3 REC/PLAY ST SP PAUSE MCUM PDMD SAM VDS RESET MON XT XT
20 Stage ADDRESS COUNTER SAD SAS TAS RWCK WE CS1 CS2 CS3 (STBY) CS4 I/O RSEL0 ADPCM ANALYZER/SYTHESIZER DATA I/O DI/O DVDD DVDD' AVDD + LPF 12-bit ADC 12-bit DAC SG CIRCUIT
+
ADDRESS CONTROLLER TIMING CONTROLLER
OSC MIN MOUT LIN LOUT AMON FIN
REGISTER CONTROLLER
20-bit ADDRESS REGISTER
20-bit STOP ADDRESS REGISTER
20-bit COMPARATOR
CS4(RSEL0)
DGND AGND
MSM6588/6588L
AOUT FOUT
ADIN
SG
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Semiconductor
Microcontroller Interface Mode
RSEL1 RSEL2 D3 D2 D1 D0 WR RD CE
ADDRESS CONTROLLER
20 Stage ADDRESS COUNTER SAD SAS TAS RWCK WE CS1 CS2 CS3(STBY) CS4 I/O RSEL0 ADPCM ANALYZER/SYTHESIZER DATA I/O DI/O DVDD DVDD' AVDD DGND AGND TEST TEST TEST TEST TEST CS4(RSEL0)
REGISTER CONTROLLER
MCU I/F TIMING CONTROLLER
20-bit ADDRESS REGISTER
STATUS REGISTER
20-bit STOP ADDRESS REGISTER
MCUM RESET MON
20-bit COMPARATOR
XT XT
OSC
+
+
LPF
12-bit ADC
12-bit DAC
SG CIRCUIT
MSM6588/6588L
MIN
MOUT LIN LOUT AMON FIN
AOUT FOUT
ADIN
SG
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PIN CONFIGURAITON (Top View)
1. Stand-alone mode (MCUM pin = "L")
SP ST REC/PLAY PAUSE PDMD MCUM CA1 CA2 CA3 VDS ADIN
1 2 3 4 5 6 7 8 9 10 11

RESET RWCK DVDD MON SAM WE XT 43 42 41 40 39 38 44 13 14 15 16 17 18 12 AMON AOUT DVDD' FIN AVDD FOUT SG
CS4(RSEL0) 35
37
36
DI/O
XT
34 33 CSEL2 32 CSEL1 31 RSEL2 30 RSEL1 29 CS2 28 CS1 27 SAD 26 SAS 25 TAS 24 DGND 23 AGND MIN 22
19
20
44-Pin Plastic QFP 44-Pin Plastic TQFP
MOUT
LOUT
LIN
21
CS3(STBY)
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Semiconductor 2. Microcontroller interface mode (MCUM pin = "H")
MSM6588/6588L
WR RD CE TEST TEST MCUM D0 D1 D2
1 2 3 4 5 6 7 8 9
D3 10 ADIN 11

44 RESET 41 RWCK 39 DVDD 43 TEST 42 MON 40 WE 38 XT 13 14 15 16 17 18 12 FIN AMON DVDD' AVDD AOUT SG FOUT
35 CS4(RSEL0)
34 CS3(STBY)
33 TEST 32 TEST 31 RSEL2 30 RSEL1 29 CS2 28 CS1 27 SAD 26 SAS 25 TAS 24 DGND 23 AGND
19
20
36 DI/O
37 XT
21 MOUT
44-Pin Plastic QFP 44-Pin Plastic TQFP
Selection of stand-alone mode or microcontroller interface mode is controlled by the level of the MCUM pin. MCUM="H": microcontroller interface mode MCUM="L": stand-alone mode
LOUT
MIN
LIN
22
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PIN DESCRIPTIONS
Common Functions in Stand-Alone Mode and Microcontroller Interface Mode
Pin 39 17 16 24 23 18 22 20 21 19 15 14 12 11 13 27 26 Symbol DVDD DVDD' AVDD DGND AGND SG MIN LIN MOUT LOUT AMON FIN FOUT ADIN AOUT SAD SAS TAS Type -- -- -- -- -- O I O Description Digital power supply pin. Insert a bypass capacitor of 0.1mF or more between this pin and the DGND pin. Digital power supply pin Analog power supply pin. Insert a bypass capacitor of 0.1mF or more between this pin and the AGND pin. Digital GND pin Analog GND pin Output pin for analog circuit reference voltage (signal ground) Inverting input pin for the built-in OP amplifier. Non-inverting input pin is connected to SG internally. MOUT and LOUT are output pins of the built-in OP amplifier for MIN and LIN, respectively. This pin is connected to the LOUT pin in recording mode and to the O I O I O O O DA converter output in playing mode. Connected to the built-in LPF input (FIN pin). Input pin for the built-in LPF. Output pin of the built-in LPF. Connected to the AD converter (ADIN pin) input. Input pin for the built-in 12-bit AD converter. Output pin for the built-in LPF. Output pin for playback waveform. Connected to the speaker drive amplifier. (Serial Address Data) Connected to the SAD pin of serial register. This pin outputs the Read/Write header address. (Serial Address Strobe) Connected to the SAS pin of serial register. Clock pin to write the serial address. (Transfer Address Strobe) Connecd to the TAS pin of serial register. 25 O Clock pin which tranfers the serial address data to the address counter inside the serial register.
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Pin 41 40 36
Symbol RWCK WE DI/O
Type O O I/O
Description (Read/Write Clock) Connected to the RWCK pin of the serial register. Clock pin for reading and writing data to the serial registers. (Write Enable) Connected to the WE pin of serial register. The pin to select read or write mode. (Data I/O) Connected to the DIN and DOUT pins of serial register. Data input and output mode. (Chip Select) Connected to the CS pin of the serial register. CS3 pin and CS4 pin have different functions depending on the number of serial registers to be connected. The number of serial registers is selected by the RSEL1 and RSEL2 pins. CS3 (STBY) pin becomes CS3 when four serial registers are used\, otherwise it is the STBY pin which outputs a "H" level at power down. CS4 (RSEL0) pin becomes CS4 when four serial registers are used, otherwise it is the RSEL0-pin used to select the number of serial registers used. RSEL2 RSEL1 CS3 (STBY) CS4 (RSEL0) L H L L L H STBY STBY STBY RSEL0 RSEL0 RSEL0 (I) (I) (I) H H CS3 CS4 (O)
28 29 34 35
CS1 CS2 CS3 (STBY) CS4 (RSEL0)
O O O I/O
(Register Select) Those pins are to select the number of serial registers to be connected. 35 30 31 CS4 (RSEL0) RSEL1 RSEL2 I/O I I RSEL2 RSEL1 RSEL0 (CS4) Number of serial voice registers L H H -- L (I) (I) (I) One One One 256Kbit 512Kbit 1Mbit L L H L -- (I) Two 1Mbit H H CS4 (O) Four 1Mbit
This pin is to select stand-alone mode or microcontroller interface mode. 6 MCUM I "L" level.... stand-alone mode "H" level.... microcontroller interface mode The IC is initialized and goes into the power-down state by input of I I O a "L" level. Connect to an oscillator. Use this input when providing an external clock. When at power down input the GND level instead. Connect to an oscillator. Leave open when using an external clock.
44 37 38
RESET XT XT
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Semiconductor Stand-Alone Mode
Pin 3 2 1 4 Symbol REC/PLAY ST SP PAUSE Type I I I I the IC is in record mode. Description
MSM6588/6588L
This pin is to select recording or playback. When an "H" level is input, When an "L" level pulse is input, record/playback is started. Internal pull up connected. When an "L" level pulse is input, record/playback is ended. Internal pull up connected. When an "L" level pulse is input, record/playback is suspended. Internal pull up connected. These pins are to select the number of recorded words and control mode. When the number of the recorded words is wished to be selected in one word, select Flex mode.
32 33
CSEL1 CSEL2
I
CSEL2 CSEL1 Number of recorded words Control mode
L L 8
L H 4 fixed
H L 2
H H 8 flex
7 8 9
CA1 CA2 CA3 I
These pins are to specify the channel. (Refer to Explanation of Functions.) This pin is to select the sampling frequency. The following is the relation between the master clock frequency (fosc) and sampling frequency (fsam). Numbers inside the parenthenses ( ) are for fosc=4.096MHz
43
SAM
I
SAM
L fOSC 768 (5.3kHz)
H fosc 512 (8.0kHz)
fsamp
This pin selects transition to the power down state. "L" level.... The IC enters power down state automatically except during 5 PDMD I record/playback. "H" level.... The IC enters standby state except during record/playback. The power down state can be entered by the RESET pin. This mode must be active when using the built-in LPF in an external circuit. This pin is to select voice triggered starting that starts recording when 10 VDS I the voice input exceeds the preset amplitude. Input an "H" level and the voice activation circuit is enabled. Input an "L" level to disabel the voice activation circuit. 42 MON O Outputs a "H" level during record/playback.
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Semiconductor Microcontroller Interface Mode
Pin 7 8 9 10 1 2 Symbol D0 D1 D2 D3 WR RD CE I I I/O Type Description
MSM6588/6588L
Bi-directional data bus. Performs input/output of commands and data with an external microcontroller.
This pin is to input WRITE pulses. Input is a "L" pulse when commands or data to the D0~D3 pins are to be input. This pin is to input READ pulses. Input is a "L" pulse when output status or data from the D0~D3 pins is to read. Chip enable. A "H" level on this pin disables WRITE (WR)/READ (RD) input pulses. Input/output of data through the D0~D3 pins is disabled. Outputs a "H" level during record/playback.
3
I
42 4, 32, 33, 43 5
MON TEST TEST
O
When record/playback is in operation using the EXT command, clocks for synchronization are output. These pins are for IC testing at the factory. Input a "L" level to the TEST pin and an "H" level to the TEST pin.
I
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MSM6588/6588L
ABSOLUTE MAXIMUM RATINGS (for MSM6588 (5 V Version))
Parameter Power supply voltage Input voltage Storage temperature Symbol VDD VIN TSTG Condition Ta = 25C -- Rating -0.3 to +7.0 -0.3 to VDD +0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS (for MSM6588 (5 V Version))
Parameter Power supply voltage Operating temperature Master clock frequency Symbol VDD TOP fOSC Condition DGND = AGND = 0V -- -- Range 3.5 to 5.5 (Note 5) -40 to +85 4.0 to 8.192 Unit V C MHz
ELECTRICAL CHARACTERISTICS (for MSM6588 (5 V Version))
DC Characteristics
DVDD=DVDD'=AVDD=4.5 to 5.5 V (Note 5), DGND=AGND=0 V, Ta= -40 to +85C Parameter "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current (Note 1) "H" input current (Note 2) "L" input current (Note 3) "L" input current (Note 2) "L" input current (Note 4) Operating current consumption Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IIL3 IDD Condition -- -- IOH = -40mA IOL = 2mA VIH = VDD VIH = VDD VIL = GND VIL = GND VIL = GND fOSC = 8MHz, no load When power down, Stand by current consumption IDDS no load Ta = -40 to +70C When power down, no load Ta = -40 to +85C Min. 0.8VDD -- VDD-0.3 -- -- -- -10 -20 -400 -- -- -- Typ. -- -- -- -- -- -- -- -- -- 7 -- -- Max. -- 0.2VDD -- 0.45 10 20 -- -- -20 15 10 50 Unit V V V V mA mA mA mA mA mA mA mA
Note: 1. 2. 3. 4. 5.
Applicable to all input pins, excluding the XT pin. Applicable to the XT pin. Applicable to all input pins without pull-up resistors, excluding the XT pin. Applicable to input pins (ST, SP, PAUSE) with pull-up resistors, excluding the XT pin. Recording and playback should be performed at a power supply voltage of 4.5 to 5.5 V. For other operations such as backing up a serial register, the IC operates at 3.5 to 5.5 V.
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Semiconductor Analog Characteristics
MSM6588/6588L
DVDD=DVDD'=AVDD=4.5 to 5.5 V, DGND=AGND=0 V Ta= -40 to +85C Parameter DA output relative error FIN admissible input voltage range FIN input impedance ADIN admissible input voltage range ADIN input impedance Op-amp open loop gain Op-amp input impedance Op-amp load resistance AOUT load resistance FOUT load resistance Symbol VDAE VFIN RFIN VADIN RADIN GOP RINA ROUTA RAOUT RFOUT Condition no load -- -- -- -- fIN = 0 to 4kHz -- -- -- -- Min. -- 1 1 0 1 40 1 200 50 50 Typ. -- -- -- -- -- -- -- -- -- -- Max. 10 VDD-1 -- VDD -- -- -- -- -- -- Unit mV V MW V MW dB MW kW kW kW
AC Characteristics 1. Common characteristics in stand-alone mode and microcontroller interface mode
DVDD=DVDD'=AVDD=4.5 to 5.5 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8kHz Parameter RESET pulse width RESET execution time (Note 1) * Symbol tRST tREX Min. 1 -- Typ. -- 125 Max. -- -- Unit ms ms
Note: Item with * is proportional to the period of sampling frequency (fsamp). 1) The oscillation stable time is added to tREX. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundreds of microseconds.
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2. Stand-alone mode The AC characteristics values of stand-alone mode are proportional to the period of the sampling frequency (fsamp).
DVDD=DVDD'=AVDD=4.5 to 5.5 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8kHz Parameter ST pulse width (Note 1) SP pulse width PAUSE pulse width Hold time of CA1, CA2, CA3, REC/PLAY for MON rise Address control time at the start of record/playback Address control time at the end of recording Time until the release of recording standby after input of SP pulse during voice standby Silence during repeated playback Time from input of PAUSE pulse until pause Time from input of ST pulse to the continuation of record/playback during pause Oscillator stable time after input of ST pulse SP pulse (during recording) to the fall of MON SP pulse (during playback) to the fall of MON PDMD Standby transient time at start of playback ="L" Standby transient time at end of playback Time from fall of MON to power down state at the end of playback SP pulse during pause to record end SP pulse during pause to playback end ST pulse to MON rise PDMD SP pulse to MON fall ="H" ST pulse to voice standby state SP pulse during pause to record/playback end Symbol tST tSP tPSE tCAH tAD1 tAD2 tSPV tMID tPP tPSP tANA tSPM1 tSPM2 tAOR tAOF tMS tPSP1 tPSP2 tSTM tSPM1 tSTV tPSP1 Min. 40 40 40 1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ. -- -- -- -- 1 1 -- 1.5 -- -- 32 -- -- 64 256 70 -- -- -- -- -- -- Max. -- -- -- -- -- -- 500 -- 250 500 -- 1 260 -- -- -- 1 260 1 1 1 1 Unit ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms
Note: 1. When the PDMD pin is "L", the oscillation stable time is added to tST. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundreds of microseconds for ceramic oscillators.
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Semiconductor 3. Microcontroller interface mode
MSM6588/6588L
DVDD=DVDD'=AVDD=4.5 to 5.5 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8kHz Paramenter RD pulse width Setup and hold time of CE for RD Data valid from fall of RD Data Hi-Z from rise of RD WR pulse width Setup and hold time of CE from WR Data setup time to rise of WR Data Hold time from rise of WR Disable time for RD and WR BUSY time after release of RESET (Note 1) BUSY time after input of 1 nibble command BUSY time after input of 2 nibble command BUSY time after input of 2 nibble command data BUSY time after input of ADRWR command BUSY time after input address data of ADRWR command Data input time after input of ADRRD command * * * * * * * Symbol tRR tCR tDRE tDRF tWW tCW tDWS tDWH tDRW tBR tB1 tB2 tBD tBAW tBAD tWAR tWDR Min. 200 30 -- -- 200 30 100 30 250 -- -- -- -- -- -- 270 50 Typ. -- -- -- 10 -- -- -- -- -- -- -- -- -- -- -- -- -- Max. -- -- 200 50 -- -- -- -- -- 125 16 16 16 270 50 -- -- Unit ns ns ns ns ns ns ns ns ns ms ms ms ms ms ms ms ms
Time between output of address data nibbles during * ADRRD command
Note:
Items with * are proportional to the period of sampling frequency (fsamp). 1) The oscillation stable time is added to tBR. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundred of microseconds for ceramic oscillators.
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Parameter Address control time at start of record/playback Address control time at end of recording START command to rise of MON STOP command to fall of MON START command to RPM bit set ("H" level) START command (during voice triggered starting) to VPM bit set ("H" level) STOP command to release of voice standby (during voice triggered starting) PAUSE command to VPM bit set ("H" level) START command (during pause) to VPM bit reset ("L" level) STOP command (during pause) to VPM bit reset ("L" level) Delay time after input of DTRW command Delay time after input of
When DTRW is being executed
Symbol * * * * * * * * * * * * * * tAD1 tAD2 tSTCM tSPCM tSTCR tSTCV tSPCV tPSCP tSTCP tSPCP tWRW tWXA1 tWXA2 tWXA3 tWRC tWWD tWPL tWSP tEM tMH tML tERD tEWR tWE1 tESP tWEX
Min. -- -- -- -- -- -- -- -- -- -- 16 16 16 270 16 50 50 16 125 -- -- -- -- 16 -- --
Typ. 1 1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 31 94 -- -- -- -- --
Max. -- -- 1 1 16 16 500 16 500 500 -- -- -- -- -- -- -- -- 330 -- -- 120 120 -- 100 250
Unit ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms
lower 4-bit of X vaddress Delay time after input of Delay time after input of upper 4-bit of X address Delay time after input of REC command * Delay time after input of write data * Delay time after input of PLAY command * Delay time after input of STOP command * EXT command to rise of MON "H" level time of MON * * * * * * *
command middle 4-bit of X address
When EXT
"L" level time of MON (during recording) (during playback) ADPCM data write pulse to input of STOP command STOP command until rise of MON
executimg MON rise to RD pulse rise command MON rise to WR pulse rise
STOP command to record/playback end *
Note: Items with * are proportional to the period of sampling frequency (fsamp).
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Semiconductor
MSM6588/6588L
ABSOLUTE MAXIMUM RATINGS (for MSM6588L (3 V Version))
Parameter Power supply voltage Input voltage Storage temperature Symbol VDD VIN TSTG Condition Ta = 25C -- Rating -0.3 to +7.0 -0.3 to VDD +0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS (for MSM6588L (3 V Version))
Parameter Power supply voltage Operating temperature Master clock frequency Symbol VDD TOP fOSC Condition DGND = AGND = 0V -- -- Range 2.7 to 3.6 -40 to +85 4.0 to 8.192 Unit V C MHz
ELECTRICAL CHARACTERISTICS (for MSM6588L (3 V Version))
DC Characteristics
DVDD=DVDD'=AVDD=2.7 to 3.6 V, DGND=AGND=0 V, Ta= -40 to +85C Parameter "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current (Note 1) "H" input current (Note 2) "L" input current (Note 3) "L" input current (Note 2) "L" input current (Note 4) Operating current consumption Stand by current consumption Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IIL3 IDD Condition -- -- IOH = -40mA IOL = 2mA VIH = VDD VIH = VDD VIL = GND VIL = GND VIL = GND fOSC = 8MHz, no load When power down, IDDS no load Ta = -40 to +70C When power down, no load Ta = -40 to +85C Typ. Min. 0.85VDD -- -- VDD-0.3 -- -- -- -10 -20 -400 -- -- -- -- -- -- -- -- -- -- -- 7 -- -- Max. -- 0.15VDD -- 0.45 10 20 -- -- -10 15 15 100 Unit V V V V mA mA mA mA mA mA mA mA
Note: 1. 2. 3. 4.
Applicable to all input pins, excluding the XT pin. Applicable to the XT pin. Applicable to all input pins without pull-up resistors, excluding the XT pin. Applicable to input pins (ST, SP, PAUSE) with pull-up resistors, excluding the XT pin.
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Semiconductor
MSM6588/6588L
Analog Characteristics
DVDD=DVDD'=AVDD=2.7 to 3.6 V, DGND=AGND=0 V Ta= -40 to +85C Parameter DA output relative error FIN admissible input voltage range FIN input impedance ADIN admissible input voltage range ADIN input impedance Op-amp open loop gain Op-amp input impedance Op-amp load resistance AOUT load resistance FOUT load resistance Symbol VDAE VFIN RFIN VADIN RADIN GOP RINA ROUTA RAOUT RFOUT Condition no load -- -- -- -- fIN = 0 to 4kHz -- -- -- -- Min. -- 1/4VDD 1 1/4VDD 1 40 1 200 50 50 Typ. -- -- -- -- -- -- -- -- -- -- Max. 5 3/4VDD -- 3/4VDD -- -- -- -- -- -- Unit mV V MW V MW dB MW kW kW kW
AC Characteristics 1. Common characteristics in stand-alone mode and microcontroller interface mode
DVDD=DVDD'=AVDD=2.7 to 3.6 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8 kHz Parameter RESET pulse width RESET execution time (Note 1) * Symbol tRST tREX Min. 1 -- Typ. -- 125 Max. -- -- Unit ms ms
Note: Item with * is proportional to the period of sampling frequency (fsamp). 1) The oscillation stable time is added to tREX. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundreds of microseconds.
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Semiconductor
MSM6588/6588L
2. Stand-alone mode The AC cjaracteristics values of stand-alone mode are proportional to the period of the sampling frequency (fsamp).
DVDD=DVDD'=AVDD=2.7 to 3.6 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8 kHz Parameter ST pulse width (Note 1) SP pulse width PAUSE pulse width Hold time of CA1, CA2, CA3, REC/PLAY for MON rise Address control time at the start of record/playback Address control time at the end of recording Time until the release of recording standby after input of SP pulse during voice standby Silence during repeated playback Time from input of PAUSE pulse until pause Time from input of ST pulse to the continuation of record/playback during pause Oscillator stable time after input of ST pulse SP pulse (during recording) to the fall of MON SP pulse (during playback) to the fall of MON PDMD Standby transient time at start of playback ="L" Standby transient time at end of playback Time from fall of MON to power down state at the end of playback SP pulse during pause to record end SP pulse during pause to playback end ST pulse to MON rise PDMD SP pulse to MON fall ="H" ST pulse to voice standby state SP pulse during pause to record/playback end Symbol tST tSP tPSE tCAH tAD1 tAD2 tSPV tMID tPP tPSP tANA tSPM1 tSPM2 tAOR tAOF tMS tPSP1 tPSP2 tSTM tSPM1 tSTV tPSP1 Min. 40 40 40 1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ. -- -- -- -- 1 1 -- 1.5 -- -- 32 -- -- 64 256 70 -- -- -- -- -- -- Max. -- -- -- -- -- -- 500 -- 250 500 -- 1 260 -- -- -- 1 260 1 1 1 1 Unit ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms
Note: 1. When the PDMD pin is "L", the oscillation stable time is added to tST. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundreds of microseconds for ceramic oscillators.
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Semiconductor 3. Microcontroller interface mode
MSM6588/6588L
DVDD=DVDD'=AVDD=2.7 to 3.6 V, DGND=AGND=0 V, Ta= -40 to +85C When fsamp=8 kHz Paramenter RD pulse width Setup and hold time of CE for RD Data valid from fall of RD Data Hi-Z from rise of RD WR pulse width Setup and hold time of CE from WR Data setup time to rise of WR Data Hold time from rise of WR Disable time for RD and WR BUSY time after release of RESET (Note 1) BUSY time after input of 1 nibble command BUSY time after input of 2 nibble command BUSY time after input of 2 nibble command data BUSY time after input of ADRWR command BUSY time after input address data of ADRWR command Data input time after input of ADRRD command * * * * * * * Symbol tRR tCR tDRE tDRF tWW tCW tDWS tDWH tDRW tBR tB1 tB2 tBD tBAW tBAD tWAR tWDR Min. 200 30 -- -- 200 30 100 30 250 -- -- -- -- -- -- 270 50 Typ. -- -- -- 10 -- -- -- -- -- -- -- -- -- -- -- -- -- Max. -- -- 200 50 -- -- -- -- -- 125 16 16 16 270 50 -- -- Unit ns ns ns ns ns ns ns ns ns ms ms ms ms ms ms ms ms
Time between output of address data nibbles during * ADRRD command
Note:
Items with * are proportional to the period of sampling frequency (fsamp). 1) The oscillation stable time is added to tBR. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundred of microseconds for ceramic oscillators.
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Semiconductor
MSM6588/6588L
Parameter Address control time at start of record/playback Address control time at end of recording START command to rise of MON STOP command to fall of MON START command to RPM bit set ("H" level) START command (during voice triggered starting) to VPM bit set ("H" level) STOP command to release of voice standby (during voice triggered starting) PAUSE command to VPM bit set ("H" level) START command (during pause) to VPM bit reset ("L" level) STOP command (during pause) to VPM bit reset ("L" level) Delay time after input of DTRW command Delay time after input of
When DTRW is being executed
Symbol * * * * * * * * * * * * * * tAD1 tAD2 tSTCM tSPCM tSTCR tSTCV tSPCV tPSCP tSTCP tSPCP tWRW tWXA1 tWXA2 tWXA3 tWRC tWWD tWPL tWSP tEM tMH tML tERD tEWR tWE1 tESP tWEX
Min. -- -- -- -- -- -- -- -- -- -- 16 16 16 270 16 50 50 16 125 -- -- -- -- 16 -- --
Typ. 1 1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 31 94 -- -- -- -- --
Max. -- -- 1 1 16 16 500 16 500 500 -- -- -- -- -- -- -- -- 330 -- -- 120 120 -- 100 250
Unit ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms
lower 4-bit of X vaddress Delay time after input of Delay time after input of upper 4-bit of X address Delay time after input of REC command * Delay time after input of write data * Delay time after input of PLAY command * Delay time after input of STOP command * EXT command to rise of MON "H" level time of MON * * * * * * *
command middle 4-bit of X address
When EXT
"L" level time of MON (during recording) (during playback) ADPCM data write pulse to input of STOP command STOP command until rise of MON
executimg MON rise to RD pulse rise command MON rise to WR pulse rise
STOP command to record/playback end *
Note: Items with * are proportional to the period of sampling frequency (fsamp).
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Semiconductor
MSM6588/6588L
TIMING DIAGRAMS
Reset Function and Power Down Function 1. Stand-alone mode when the PDMD pin is "L".
RESET(I)
STBY(O)
, ,
VDD Unstable VDD Unstable
tRST
tREX
Power dowm Reset operation in progress
Power down
2. Stand-alone mode when the PDMD pin is "H" and in microcontroller interface mode.
tRST RESET(I) tREX STBY(O)
Power down
Reset operation in progress
Standby for record/playback
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Semiconductor Stand-alone Mode
1. Timing during recording (PDMD pin="L", VDS pin="L")
2. Timing during recording by voice triggered starting (PDMD pin="L", VDS pin="H")
, , , , , , , , , , , , , ,
MSM6588/6588L
RSEL0 - RSEL2 (I) CSEL1, CSEL2 (I) CA1 - CA3 RESET (I) (I) (I) REC/PLAY tST tCAH ST (I) tSP SP (I) tSPM1 Oscillation start Oscillation stop XT XT (I) (O) Oscillation in progress tANA MON (O) STBY (O) tAD1 tAD2 Power down Analog stable time Recording Power down Address control Address control RSEL0 - RSEL2 (I) CSEL1, CSEL2 (I) CA1 - CA3 RESET (I) (I) (I) REC/PLAY tST tCAH ST (I) tSP tSP SP (I) tSPV tSPM1 Oscillation start Oscillation stop XT XT (I) (O) Oscillation in progress tANA MON STBY (O) (O) tAD1 Power down Analog stable time Standby for voice Recording tAD2 Power down Determined as voice Address control Address control When the STOP pulse is input during the standby for voice, the IC goes into the power-down state.
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Semiconductor 3. Timing during playback (PDMD pin="L")
MSM6588/6588L
RESET
(I)
,, ,, ,, ,, ,, , ,, ,, ,, ,, , ,
REC/PLAY ,(I) ST SP XT XT MON STBY (I)
tST
,
tSP (I) (I) (O) (O) (O)
Oscillating tSPM2 tMS
AOUT
(O) tANA
Power down
tAOR
tAD1
Playback
tAOF
Standby transition time Power down
Analog Standby stable time transition time
4. Timing during repeated playback (PDMD pin="L")
ST SP MON STBY
(I) (I) (O) tMS (O) tSP tSPM2
AOUT
(O) tANA tAOR tMID
Second playback
tAOF
n-th playback Standby transition time Power down
Power down First playback Analog stable Standby time transition time
No voice
Note: Repeated playback is executed only when only one serial register is connected.
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Semiconductor
5. Timing during recording (PDMD pin="H", VDS pin="L")
6. Timing during recording by voice triggered starting (PDMD pin="H", VDS pin="H")
, , , , , , , , , , , , , , , ,
MSM6588/6588L
RSEL0 - RSEL2 (I) CSEL1, CSEL2 (I) CA1 - CA3 RESET (I) (I) (I) REC/PLAY tST tCAH ST (I) tSP SP (I) Oscillation start Oscillation stop XT XT (I) (O) Oscillating tSTM tSPM1 MON (O) (O) STBY tAD1 tAD2 Standby Recording Standby Power down Power down Address control Address control RSEL0 - RSEL2 (I) CSEL1, CSEL2 (I) CA1 - CA3 RESET (I) (I) (I) REC/PLAY tST tCAH ST (I) tSP tSP SP (I) Oscillation start tSTV tSPV tSPM1 Oscillation stop XT XT (I) (O) Oscillating MON STBY (O) (O) tAD1 Power down Standby Standby for voice Determined as voice Recording tAD2 Standby Power down Address control Address control When the STOP pulse is input during the standby for voice, the IC goes into the power-down state.
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Semiconductor 7. Timing during playback (PDMD pin="H")
MSM6588/6588L
RESET
(I)
,, ,, ,, ,, ,, ,, ,, ,, ,, ,,
REC/PLAY (I) ST SP XT XT MON STBY (I) (I)
,,
tST
,, ,, , ,,
tSP
,,
,,
,,
,,
,,
,,
(I) (O) tSTM (O) (O) tSPM1
AOUT
(O)
GND level
tAD1
Standby Power down Address control Playback Standby Power down
8. Timing during repeated playback (PDMD pin="H")
RESET ST SP MON STBY
(I) (I) (I) tSTM (O) (O)
1/2 VDD level GND level 1/2 VDD level GND level
tSP tSPM1
AOUT
(O)
tAD1
Power down Standby
Address control
tAD1
First playback
2nd playback
n-th playback
Standby
Power down
No voice
Note: Repeated playback is executed only when only one serial register is connected.
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Semiconductor 9. Timing of pause in record/playback
tST tST
MSM6588/6588L
ST SP
(I)
Start pulse Re-start pulse tSP
(I)
tPSE tPSE
PAUSE (I)
tPP tPST tPP tPSP1 tPSP2
MON (O)
Standby Record/Playback Pause Record/Playback Pause Standby
Note: tPSP1 ...... for recording or playback with the PDMD pin="H" tPSP2 ...... for recording or playback with the PDMD pin="L"
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Semiconductor
Microcontroller Interface 1. Data read (RD pulse)
2. Data write (WR pulse)
, ,
CE (I) (I) RD D0 - D3 (I/O) CE (I) (I) WR D0 - D3 (I/O)
tCR
tRR tDRE
tCW
tWW tDWS
,, , ,,
tCR tDRF tCW tDWH
MSM6588/6588L
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Semiconductor
MSM6588/6588L
3. Input method of 1 nibble command (NOP, PAUSE, PLAY, REC, START and STOP commands)
WR
(I)
tDRW
RD
(I)
D0 - D3
(I/O)
Command input Status output
Status register BUSY bit
tB1
4. Input method of 2 nibble command (SAMP, CHAN and VDS commands)
WR
(I) tDRW tDRW
RD
(I)
Status output Status output
D0 - D3
(I/O)
Command input (first nibble) Data input (second nibble)
Status register BUSY bit
tB2
tBD
31/101
Semiconductor 5. Input method of ADRWR command
MSM6588/6588L
WR RD
(I)
(I)
D0 - D3
(I/O)
Status ADRWR command input (first nibble) Address data input (2nd nibble) Address data input (3rd nibble) Address data input (9th nibble) WR pulse input enabled tBAD
Status register BUSY bit
tBAW
tBAD
tBAD
Note: 1. In the BUSY bit of the status register, input the command after checking that it is not in the BUSY state. 2. Next, input the address data into 2nd through 9th nibble command, but after checking that the status is not BUSY by either method as follows. * Check on the Busy bit of the status register * Input the next WR pulse after the waiting time of tBAW or tBAD 6. Input method of ADRRD command
WR
(I) tWAR tWDR tWDR
WR, RD pulse input enabled
RD
(I)
D0 - D3
(I/O)
Command input Address data output Address data output (first nibble) (2nd nibble) (3rd nibble) (4th nibble)....(8th nibble) (9th nibble)
Note: 1. In the BUSY bit of the status register, input the command after checking that it is not in the BUSY state. 2. Next, read out the address data into 2nd through 9th nibble command, but this can not check the BUSY bit by the RD pulse input. Input the next RD pulse after waiting time of tWAR or tWDR.
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Semiconductor 7. Recording method by START command
MSM6588/6588L
RESET WR RD D0 - D3
(I) (I) (I) (I/O)
START command (STOP command)
,, ,, ,, ,, ,, ,
,,
,,
,,
,,
,,
,
tSTCM MON STBY (O) (O) tBR tB1 tB1
tSPCM
Status register BUSY bit RPM bit
tAD1 tSTCR
Power down
Reset operation in progress
tAD2
Recording Standby
Address control
Standby
Address control
Power down
8. Timing of voice triggered starting
WR RD D0 - D3
(I) (I) (I/O)
START command Status (STOP command) (STOP command)
tSPCV
tSPCV
MON
(O)
Status register BUSY bit RPM bit VPM bit
Standby
tB1
tB1
tB1
tSTCR, tSTCV Standby for voice
tAD1
Recording
Address control
tAD2
Standby
Address control
Determined as voice
When STOP command is input, the IC enters standby for recording.
33/101
Semiconductor 9. Playback method using START command
MSM6588/6588L
RESET WR RD D0 - D3
(I) (I) (I) (I/O)
START command Status (STOP command)
,, ,, ,, ,, ,, ,
,,
,,
,,
,,
,,
,
tSTCM
tSPCM
MON STBY
(O) (O) tBR tB1 tB1
Status register BUSY bit RPM bit
tSTCR
AOUT
(O)
GND level
1/2 VDD level
1/2 VDD level GND level
tAD1
Power down Reset operation in progress Standby Address control Playback Standby Power down
10. Timing of pause in record/playback using PAUSE command
WR RD D0 - D3
(I) (I) (I/O)
START command PAUSE command START command PAUSE command STOP command
tSTCM MON (O) tSPCM tB1 tB1 tB1 tB1 tB1
Status register BUSY bit RPM bit tSTCR VPM bit
Standby
tPSCP
tSTCP
tPSCP
tSPCP
Record/Playback
Pause
Record/Playback
Pause
Standby
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Semiconductor 11. Timing of data transfer by DTRW command
MSM6588/6588L
tWRW tWXA1 tWXA2 WR RD D0 - D3 (I) (I) (I/O)
tWXA3
tWRC
tWWD tWPL
tWSP
Next command input enabled
STOP command DTRW command lower 4 bits of X address middle 4 bits of X address upper 4 bits of X address REC Write-in command data PLAY command Read-out data
Address input
Write access
Read access
12. Timing of recording by EXT command
RESET WR RD
(I)
,, ,,
,, ,, ,
,,
,,
,
(I) (I)
D0 - D3 (I/O)
REC command EXT command ADPCM data ADPCM data STOP command Next command input enabled
tEM MON STBY (O) (O)
Power down Standby
tMH
tML
tERD
tESP
tWEX
Recording
Standby Power down
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Semiconductor 13. Timing of playback by EXT command
MSM6588/6588L
RESET WR RD
(I)
,,
,, ,, ,, ,
,,
,,
,,
(I) (I)
D0 - D3 (I/O)
Play EXT command command Status tEM ADPCM data tMH tML tEWR ADPCM data tESP STOP command Next command input enabled
tWEX
MON STBY AOUT
(O) (O) (O)
1/2 VDD level GND level Power down Standby Playback 1/2 VDD level GND level Standby Power down
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Semiconductor
MSM6588/6588L
FUNCTIONAL DESCRIPTION
Recording Time and Memory Capacity Recording time depends on the memory capacity of the external serial registers, sampling frequency, and the ADPCM bit length, and is expressed as Recording time = 1.024 memory capacity(Kbit) (sec) sampling frequency (kHz) bit length
For example, if the sampling frequency is 5.3 kHz with a 3bit ADPCM and 4 serial registers, it is possible to record up to 262 seconds because Recording time= 1.024 1024 (Kbit) 4 = 262 (sec) 5.3 (kHz) 3(bit)
Analog Input Amplifier Circuit
This IC has two built-in operational amplifiers for amplifying the microphone output. Each OP amplifier is provided with the inverting input pin and output pin. The analog circuit reference voltage SG (signal ground) is connected internally to the non-inverting input of each OP amplifier.
For amplification, form an inverting amplifier circuit and adjust the amplification ratio by using external resistors as shown below.
VIN
- +
VMO R1 MIN
- +
VLO R3 R4 LOUT
-
R2 MOUT
LIN
OP amp1
+
OP amp2
SG
VLO=
R4 R3
VMO=
R2 * R4 R1 * R3
VIN (V)
During recording, the output VLO of OP amp 2 is connected to the input FIN of the LPF. Adjust the amplification ratio by using the external resistors so that the VLO amplitude is within the FIN admissible input voltage (VFIN) range. If VLO exceeds the VFIN range, the LPF output waveform will be distorted.
,,
VDD VLO VFIN (max.) 1/2VDD VFIN (min.) GND
The table below shows an example of the FIN admissible input voltage range for the MSM6588 and the MSM6588L.
Parameter MSM6588 MSM6588L Power Surpply Voltage VDD 5V 3V FIN admissible input Voltage range VFIN min max 1V 0.75 V 4V 2.25 V FIN admissible input Voltage 3Vp-p 1.5Vp-p
The value of the OP amp load resistance ROUTA is 200kW minimum. Therefore the values of the inverting amplifier circuit feedback resistors R2 and R4 should be 200 kW or more. 37/101
Semiconductor Connection of LPF Circuit Peripherals
MSM6588/6588L
Inside the IC, the AMON pin is connected to the output of the amplifying circuit in recording mode (LOUT pin) and output of the DA converter in playback mode. This means that the AMON pin is directly connected to the input pin (FIN pin) of the built-in LPF. Both the FOUT pin and AOUT pin are output pins of the built-in LPF. The FOUT pin is connected to the input pin (ADIN pin) of the AD converter and the AOUT pin is connected to a speaker through the speaker amplifier. The connection of the FOUT pin and the AOUT pin changes according to the output of LPF, SG level or GND level inside the LSI depending on the operation state which is summarized by the following: * Microcontroller interface mode and stand-alone mode when the PDMD pin ="H"
At power down (RESET pin="L") GND level GND level During operation (RESET pin="H") Recording mode LPF output (record wave form) SG level Playback mode LPF output LPF output (playback wave form)
Analog pin FOUT pin AOUT pin
* Stand-alone mode when the PDMD pin ="L"
During operation Recording mode LPF output (record wave form) GND level Playback mode LPF output LPF output (playback wave form)
Analog pin FOUT pin AOUT pin
At power down GND level GND level
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Semiconductor
MSM6588/6588L
* Microcontroller interface mode and stand-alone mode when the PDMD pin ="H"
Speaker drive amplifier
LIN - + SG
LOUT AMON Record mode Playback mode
FIN
AOUT
FOUT
ADIN
LPF
Playback mode Record SG mode
- + Power down
ADC
DAC
GND - +
GND
Power down
Note: Switches in the figure denote the state during record operation. * Stand-alone mode when the PDMD pin ="L"
Speaker drive amplifier
LIN - + SG
LOUT AMON Record mode Playback mode
FIN
AOUT
FOUT
ADIN
LPF
- +
Play back ADC
DAC
- + Power down GND
Note: Switches in the figure denote the state during record operation.
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Semiconductor LPF Characteristics
MSM6588/6588L
This IC has a built-in fourth order LPF using switched capacitor filter technology. The filter characteristics are -40dB/oct. Both the cut-off frequency and frequency characteristics change in proportion to the sampling frequency (fsamp). The cut-off frequency is preset to 0.4 times the sampling frequency. The following graph depicts the frequency characteristics of LPF when fsam = 8 kHz.
Gain (dB)
20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 100 1k 10k f (Hz)
LPF Frequency Characteristics (fsam=8.0 kHz) Full Scale of A/D and D/A Converters
Full scale of A/D and D/A converters Parameter MSM6588 MSM6588L min (V) 0 1 V DD 4 max (V) VDD 3 V DD 4 amplitude (Vp-p) VDD 1 V DD 2
1. When the MSM6588 is used
VDD (5 V) VDD-1 (4 V) 1 V (2.5 V) 2 DD 1 V (1 V) 0 V (0 V) Full scale of A/D and D/A converters Note: Values in perentheses are for VDD=5.0 V. LPF admissible input Voltage range
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Semiconductor 2. When the MSM6588L is used
VDD (3 V) 3 V (2.25 V) 4 DD 1 V (1.5 V) 2 DD 1 V (0.75 V) 4 DD 0 V (0 V)
MSM6588/6588L
Full scale of A/D and D/A converters Note: Values in parentheses are for VDD=3.0 V. LPF admissible input Voltage range
Voice Triggered Starting This IC has a voice triggered starting function that starts recording when the amplitude of voice input exceeds a preset threshold. The voice triggered starting function is controlled by the VDS pin in stand-alone mode and by the VDS command in microcontroller interface mode. The voice standby state can be released by a STOP pulse or the STOP command. During recording/playback using the EXT command in microcontroller interface mode, voice triggered starting cannot be used.
Stand-alone mode Microcontroller interface mode VDS pin VD1 VD0 Vocie detection level VVDS MSM6588 (5V version) Values inside ( ) are for VDD=5.12V MSM6588L (3V version) Values inside ( ) are for VDD=3.072V L 0 0 Voice triggered starting disabled Voice triggered starting disabled -- 0 1 VDD/64 (80mV) VDD/128 (24mV) H 1 0 VDD/32 (160mV) VDD/64 (48mV) -- 1 1 VDD/16 (320mV) VDD/32 (96mV)
Voice input level (ADIN pin) Upper threshold + VVDS 1/2 VDD - VVDS Lower threshold
Determined as voice, recording starts
Start signal input
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Semiconductor How to Connect an Oscillator
MSM6588/6588L
Connect a ceramic oscillator or a crystal oscillator to XT and XT pins as shown below. The optimal load capacities when connecting ceramic oscillators from MURATA MFG., KYOCERA CORPORATION, and TDK CORPORATION are shown below for reference.
MSM6588 MSM6588L XT C1 XT C2
1. MSM6588
Ceramic oscillator Type CSA4.00MG CST4.00MGW MURATA MFG. CSA6.00MG CST6.00MGW CSA8.00MTZ CST8.00MTW KBR-4.0MSA KBR-4.0MWS KBR-4.0MKS PBRC4.00A KYOCERA CORPORATION KBR-6.0MSA KBR-6.0MWS KBR-6.0MKS PBRC6.00A KBR-8.0M KBR-8.0MWS PBRC8.00A TDK CORPORATION FCR4.0MC5 (with capacitor) 4.0 -- -- (with capacitor) 8.0 33 (with capacitor) 6.0 33 (with capacitor) 4.0 Freq(MHz) 4.0 6.0 8.0 30 30 Optimal load capacity C1(pF) C2(pF)
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Semiconductor 2. MSM6588L
Ceramic oscillator Type CSA4.00MG CST4.00MGW MURATA MFG. CSA6.00MG CST6.00MGW CSA8.00MTZ CST8.00MTW KBR-4.0MSB KBR-4.0MKC PBRC4.00A PBRC4.00B KYOCERA CORPORATION KBR-6.0MSB KBR-6.0MKC PBRC6.00A PBRC6.00B KBR-8.0M PBRC8.00A PBRC8.00B FCR4.0M5 FCR4.0MC5 TDK CORPORATION FCR6.0M5 FCR6.0MC5 FCR8.0M2S (with 30pF capacitor) (with 30pF capacitor) (with capacitor) 4.0 6.0 8.0 8.0 (with capacitor) (with capacitor) 6.0 (with capacitor) (with capacitor) 4.0 (with 30pF capacitor) (with 30pF capacitor) (with 30pF capacitor) Freq(MHz) 4.0 6.0 8.0
MSM6588/6588L
Optimal load capacity C1(pF) 30 -- 30 -- 30 -- 33 -- 33 -- 33 -- 33 -- 33 33 -- 33 -- 33 -- 33 C2(pF) 30 -- 30 -- 30 -- 33 -- 33 -- 33 -- 33 -- 33 33 -- 33 -- 33 -- 33
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Semiconductor How to Connect Power Supply
MSM6588/6588L
This IC uses a single power supply which is divided into two routes on the wiring, one is to the analog section, and the other is to the logic section.
VDD DVDD DVDD' AVDD
MSM6588 MSM6588L
DGND AGND
The following connections are not permitted.
Power supply for analog Power supply for digital DVDD' DVDD AVDD +5V DVDD' DVDD AVDD
Data Configuration of External Serial Registers The external serial registers are composed of (X address in the word direction) (depth of 1Kbit) and are divided into the channel index area and the voice (ADPCM) data area. The maximum address of X address in the word direction can be summarized in the following table depending on the memory capacity of connected serial registers:
Memory capacity of connected serial registers (bit) 256K 512K 1M 2M 3M 4M
Maximun X address 0FFh 1FFh 3FFh 7FFh BFFh FFFh
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Semiconductor 1. Channel index area
MSM6588/6588L
Addresses 000h-007h, are header addresses for the serial registers and are known as the channel index area which store the start and stop address of each channel. The start address and stop address are expressed by 12-bit and by 20-bit, respectively.They store the header and tail addresses of the voice data for each channel.
Depth of 1 K-bit in the Y direction 20-bit 12-bit 992-bit
X address
000h 001h 002h 003h 004h 005h 006h 007h
SP0 SP1 SP2 SP3 SP4 SP5 SP6 SP7
ST0 ST1 ST2 ST3 ST4 ST5 ST6 ST7
ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7
Unused
Start address
X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11
Header X address of channel
Stop address
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11
Tail Y address of channel
Tail X address of channel
Lower
upper
Lower
upper
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Semiconductor 2. Voice (ADPCM) data area
MSM6588/6588L
Addresses after 008h of the X address are the voice data area and store ADPCM data.
Depth of 1K-bit in the Y direction X address ADPCM data
008h 009h X direction
Maximum address
The storage method of ADPCM data per 1 address in the X-direction (1K-bit) is different for 3bit and 4-bit ADPCM. It is summarized as follows: 3-bit ADPCM 3-bit data 340 samples = 1020-bit stored in the 1K-bit memory area. The Y address is assigned one address per two samples and is controlled by 00h-A9h.
1K-bit in the Y direction Y address 00h 01h ADPCM 339 A9h Unused 4-bit ADPCM 340
ADPCM ADPCM ADPCM ADPCM 1 2 3 4
4-bit ADPCM 4-bit data 256 samples = 1024-bit are stored in the 1K-bit memory area. The Y address is assigned one address per two samples and is controlled by 00h-7Fh.
1K-bit in the Y direction Y address ADPCM 1 00h ADPCM 2 01h ADPCM 3 7Eh ADPCM 254 ADPCM 255 7Fh ADPCM 256
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Semiconductor Selection of Serial Registers
MSM6588/6588L
RSEL1 and RSEL2 are used select the type and the number of serial registers connected externally. The CS4 (RSEL0) pin functions as a CS4 output pin when RSEL1=RSEL2="H" and as an RSEL0 input pin otherwise to select either 512Kbit or 256Kbit.
RSEL2 RSEL1 RSEL (CS4) L (I) Number of serial registers One 256Kbit L L H (I) One 512Kbit L H -- (I) One 1Mbit H L -- (I) Two 1Mbit H H CS4 (O) Four 1Mbit
Recording Control Modes The recording control modes include fixed and flex mode during stand-alone operation and fixed, flex and direct mode during microcontroller interface operation. The recording control mode is specified by the CSEL1 and CSEL2 pin in stand-alone operation and by data input via commands (RCON, CSEL1 AND CSEL2) during microcontroller interface operation.
Number of recording words 8-word 8-word 4-word 2-word 8-word
RCON L
CSEL2 -- L
CSEL1 -- L H L H
Control mode Direct mode (only in microcontroller interface mode) Fixed mode (When the number of the recorded words is wished to be selected in one word, select Flex mode.) Flex mode
H
L H H
1. Direct mode This mode can be used in microcontroller interface mode only. The start and stop address of each channel are input to the channel index area directly from the microcontroller. This means that the assignment of memory capacity of each channel is controlled by the microcontroller. 2. Fixed mode This mode can be used in both stand-alone mode and in microcontroller interface mode. The start and stop address of each channel can be set indirectly by the channel selection (CA1CA3) and they are input to the channel index area. The memory capacity of the external serial register equally divided by the number of recording words is assigned to each channel by CSEL1 and CSEL2. (Hereafter, this will be called the channel memory capacity).
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Semiconductor
MSM6588/6588L
, , , , , , , ,
When recording, ADPCM data is written in from the header address of the selected channel memory capacity. When stopping recording by the STOP signal, the memory capacity after that is unused. An example of selecting 4-word as the number of recording words
Memory capacity of serial register ch0 header address Unused ch1 header address ch2 header address Unused ch3 header address Unused ch0 ch1 ch2 ch3 ch0 memory capacity ch1 memory capacity ch2 memory capacity ch3 memory capacity Channel index area
3. Flex mode
This mode can be used in both stand-alone mode and microcontroller interface mode. The start and stop addresses of each channel are indirectly set by channel selection (CA1 - CA3) and are input to the channel index area. When recording at the initial state (no recording has been performed in any channels), it is necessary to record in the order of ch0 to ch7. When starting recording of ch0, ADPCM data is stored from the header of the voice data area and the recording is stopped when the STOP signal is input. When the STOP signal is not input, recording is stopped when the maximum address of the serial register reached. When ch1 is selected subsequently, the recordable memory area starts from the address incremented by 1 from the stop address of ch0 through the maximum address. Similarly, the recording continues to ch2, ch3.... The start address of chn is the one incremented by 1 from the stop address of chn-1. An example of recording 3 words onto 1Mbit serial register
Memory capacity of serial register
ch0 stop address = SP0 281h (30h)
SP1 31Fh (22h)
SP2 3FFh (A9h) ch2 320h ST2
Channel index area ch0 008h
,, ,,
ch1 282h
,,
,
ch0 start address = ST0
ST1
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Semiconductor Channel Usage
MSM6588/6588L
A channel can be specified by CA1, CA2 and CA3. In stand-alone mode, CA1-CA3 pins are used while in microcontroller interface mode, command data is input with (CA1-CA3). 1. Selection of a channel in direct mode and flex mode The number of recording words is 8 and is specified by CA1-CA3 as follows:
CA3 L L L L H H H H CA2 L L H H L L H H CA1 L H L H L H L H Channel ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7
2. Channel selection in fixed mode The relationship between the number of recorded words (CSEL1, CSEL2) and channels (CA1- CA3) is shown in the following table.
Number of recorded words
CSEL2
CSEL1
CA3 L L L L H H H H L L H H L H
CA2 L L H H L L H H L H L H -- --
CA1 L H L H L H L H -- -- -- -- -- --
Channel ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch0 ch1 ch2 ch3 ch0 ch1
L
L
8-word
L
H
4-word
H
L
2-word
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Semiconductor
MSM6588/6588L
The relationship between the external serial registers, the number of recorded words and the channel memory capacity is shown in the following table.
Channel memory capacity 256Kbit serial register 32Kbits (1 second) 64Kbits (2 seconds) 128Kbits (4 seconds) 512Kbit serial register 64Kbits (2 seconds) 128Kbits (4 seconds) 256Kbits 1Mbit serial register 128Kbits (4 seconds) 256Kbits 512Kbits 2Mbit serial register 256Kbits 512Kbits 1Mbits 4Mbit serial register 512Kbits 1Mbits 2Mbits
CSEL CSEL 2 L L H 1 L H L
Number of recorded words 8-word 4-word 2-word
(8 seconds) (16 seconds)
(8 seconds) (16 seconds) (32 seconds)
(8 seconds) (16 seconds) (32 seconds) (64 seconds)
Note: Numbers in ( ) are recording time of each channel when the bit rate is 32 kbps. Assignment to channel and channel memory capacity when connecting a 1 Mbit serial register
Channel index area X address of serial register
007h 07Fh 17Fh 27Fh 37Fh 0FFh 1FFh 2FFh
CSEL2 CSEL1 L L
8-word fix
ch0
007h 000h 008h 080h
ch1
100h
ch2
180h
ch3
200h
ch4
280h
ch5
300h
ch6
380h
ch7
0FFh
1FFh
2FFh
,,
L
H
007h 000h 008h
100h
200h
1FFh
300h
4-word fix
,,
,
,,
,,
ch0
ch1
ch2
ch3
H
L
007h 000h 008h
,,
,
200h
2-word ,, , fix
ch0
,,
ch1
H
H
000h
,,
,,
By combining CSEL1, CSEL2, CA1, CA2 and CA3, it is possible to assign (the encircled channels) ch0=16 seconds, ch2=8 seconds and ch3=8 seconds (fsam=8 kHz, 4 bit ADPCM).
008h
8-word flex
3FFh
3FFh
3FFh
3FFh
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Semiconductor Operation in Stand-alone Mode 1. Power down function
MSM6588/6588L
Transition to power down mode is selected by the PDMD pin and is summarized as follows:
PDMD pin L H Power down operation The IC automatically enters the power down state except during recording/playback. The IC powers down by input of a "L" level to the RESET pin. When the RESET pin="H" level, the IC is in stand-by mode and the analog circuit is active. When using the built-in LPF with external circuit, select this mode.
During power down, the IC stops oscillating to minimize power consumption and the circuit enters the initialized state. When using an external clock, input the GND level to the XT pin to reduce power consumption. 2. Master clock frequency and sampling frequency The relationship between the master clock frequency (fOSC) and the sampling frequency (fsamp) is summarized in the following table by the SAM pin.
SAM fsamp L fOSC 768 (5.3kHz) H fOSC 512 (8.0kHz)
Note: Numbers inside ( ) are for master clock frequency fOSC = 4.096 MHz.
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Semiconductor 3. Method of recording
MSM6588/6588L
(1) Select the sampling frequency by the SAM pin. (2) Specify whether the voice triggered starting is used by the VDS pin. (3) Select the number of words by the CSEL1 and CSEL2 pins and the channel by the CA1, CA2, and CA3 pins. (4) Input the "H" level to the REC/PLAY pin to set recording mode. (5) Input a "L" pulse to the ST pin to start recording. To finish recording in the middle, input a SP pulse. The time between these two pulses is recording time. When recording is started by input of a "L" pulse to the ST pin and continues to the end of the channel memory capacity, the recording is automatically finished at that point. The MON pin outputs a "H" level during recording.
Start pulse ST SP MON (I) (I) (O) Recording in progress (stopped in the middle) Channel memory capacity Invalid
Stop pulse
Start pulse ST MON (I) (O) Recording in progress Channel memory capacity Recording automatically finished
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Semiconductor 4. Method of playback
MSM6588/6588L
(1) Select the sampling frequency by the SAM pin. (2) Select the number of words by the CSEL1 and CSEL2 pins and the channel by the CA1, CA2 and CA3 pins. (3) Input a "L" level to the REC/PLAY pin to set playback mode. (4) Input a "L" level pulse to the ST pin to start playback. When played back for the duration of recorded time, the playback ends automatically. To stop the playback in the middle, input a "L" level pulse to the SP pin. The MON pin outputs a "H" level during playback. Do not start playback in channels not recorded because the playback data and time are undefined. However, playback under these conditions can be halted by a SP pulse.
Start pulse ST MON (I) (O) Playback in progress (same as recording time) Playback automatically finished
Start pulse ST SP MON (I) (I) (O) Playback in progress (stopped in the middle) Recorded time Stop pulse
By maintaining the ST pin at "L" level, repeated playback is possible. Repeated playback is executed only when only one serial register is connected.
ST SP MON
(I) (stop pulse) (I) (O) First playback 2nd playback 3rd playback
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Semiconductor 5. Method of pause in record/playback
MSM6588/6588L
By input of a "L" level pulse to the PAUSE pin during record/playback, input a "L" level pulse to the ST pin. The recording/playback is finished when a "L" level pulse is input to the SP pin.
Start pulse ST PAUSE (I) (I) Pause pulse Pause
Start pulse
Resume
Start pulse ST SP PAUSE (I) Stop pulse (I) (I) Pause pulse
Pause
Record/Playback finished
After resuming record/playback, the voice triggered starting circuit does not operate and the recording is resumed when a START pulse is input.
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Semiconductor 6. Operation in voice triggered starting
MSM6588/6588L
By input of a "H" level to the VDS pin, recording by voice triggered starting can be performed. Using the voice triggered starting, the memory capacity can be utilized effectively by eliminating any data prior to voice detection. However, it does not remove silence data during recording. Input of a ST pulse initiates standby for voice and recording is started when voice is detected. The MON pin outputs a "H" level.
Start pulse Stop pulse SP MON (I) (O) Standby for voice Recording in progress
ST
(I)
Determined as voice
When a STOP pulse is input during standby for voice, the standby for voice is finished and the IC enters standby for recording.
ST SP
(I) (I)
Start pulse Stop pulse
Standby for recording
Standby for voice
Standby for recording
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Semiconductor 7. Method of re-recording
MSM6588/6588L
7.1 Fixed mode In this mode, because the memory area that each channel can use is already assigned, rerecording can by performed without interfering with the contents of other channels. Rerecording can be performed from the beginning similar to a new recording, regardless of the previous recording time. 7.2 Flex mode In this mode, recording for each channel is started from the address incremented by +1 from the address of preceding channel, chn-1 (if ch0, the header address of the voice data area) and the recording continues until the input of a SP pulse. If a SP pulse is not input, the recording is continued until the maximum address of the external serial register. This indicates that if the duration of recording is longer than the previously recorded time, it interferes with the contents of proceeding channels. The following shows an example in which the first recording is performed as in Figure (a) and after that each channel is re-recorded. If the duration of re-recording of ch0 is shorter than the initially recorded time, all the channels function properly as shown in Figure (b). If the duration of re-recording of ch1 is longer than the initially recorded time and reaches the range of ch2, ch0, and ch1 function properly but the playback data of ch2 becomes undefined as ch2 is played back from the middle of ch1 data. By re-recording ch2 as shown if Figure (d), ch0-ch2 function properly.
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Semiconductor Memory capacity of external serial register
ch0 stop address=SP0 Channel index area
,, ,,
MSM6588/6588L
SP1
SP2
(a) ch0 start address=ST0
,, ,, ,, ,
ch0
ch1 ST1 ST2
ch2
SP0
,, ,,
Unused
,, ,, ,,
SP1
,,
SP2
(b)
,
ch0 new ST0
,, ,, ,, ,,
,
ch1 ST1 ST2
ch2
,,
,,
,,
,,
,,
,,
,,
,,
SP0
SP1
SP2
(c)
,,
,,
,,
ch0 new ST0 ST1 ch0 new (normal)
ch1 new ST2 ch1 new (normal)
ch2
,,
,,
ch2 (undefined)
SP0
SP1
SP2
(d)
,, ,, ,, ,
ch0 new ST0 ST1
ch1 new
ch2 new ST2
8. Pull-up resistor In stand-alone mode, a pull-up resistor is connected internally to the ST, SP and PAUSE pins. However, the resistor is disconnected during a "L" level input to the RESET pin.
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Semiconductor Operation in Microcontroller Interface Mode
MSM6588/6588L
There are 13 data bus commands, D0 to D3 and WR, RD and CE which control the MSM6588/ 6588L in this mode. It has an internal status register so that the state of the LSI can be monitored. 1. Command input method Input of commands and data can be performed by input of a "L" level (WR pulse) during command data input on the D0 to D3-pin. Input of a "L" level (RD pulse), outputs status or data to the D0 to D3-pin. The CE pin controls enable/disable of the WR and RD pulses. Input of a "L" level enables WR and RD pulses, while a "H" level disables WR and RD pulses and D0 to D3 become highimpedance. When using the D0 to D3-pin with the MSM6588/6588L alone, the CE pin can be fixed at the "L" level. 1.1 Input method of 1 nibble command (1) Input a RD pulse to fetch the contents of the status register and make sure that the BUSY bit is 0. When it is 1, repeat input of RD pulses until it becomes 0. (2) Send a command to the D0 to D3-pin to input a WR pulse. (3) Confirm that it is not BUSY state as in (1) during input of the next command. Alternatively, wait for the duration of the BUSY time.
,, ,, ,, , ,, ,, , ,, ,, ,, ,, ,, ,, ,, ,, ,, ,,
CE WR
,,
(I) (I)
,,
,,
,,
,,
,
,,
,,
,,
,,
,,
,,
,,
,,
,,
,,
,,
RD
(I) ,,,,,
,,
,,
,,
,,
,,
,
,,
,,
,,
,,
,,
,,
,
,,
,,
,,
,,
,
,,
,
D0 - D3 (I/O) Status output Command input Status output
Busy time Next command input enabled
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Semiconductor
MSM6588/6588L
RD pulse input
Status output
No
BUSY=0? Yes
BUSY bit confirmed
WR pulse input
Command input
1.2 Input method of 2 nibble command (1) Input a RD pulse to confirm the BUSY bit. (2) Send a command to the D0 to D3-pin to input an WR pulse. (3) Input a RD pulse and wait until the BUSY bit becomes 0. Alternatively, wait for the duration of the BUSY time. (4) Set data to the D0 to D3-pin to input a WR pulse.
,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,,
CE WR RD
(I) (I) ,
,,
,,
,,
,
,,
,,
,,
,,
,,
,,
,,
,
,,
,,
,,
(I)
,,
,,
,,
,,
,
,,
,,
,,
,,
,,
,,
,,
,,
,
,,
,,
,,
,,
,,
,,
,,
,
D0 - D3 (I/O) Status 1st nibble Command Status 2nd nibble Command
Busy time 2nd nibble Command
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Semiconductor
MSM6588/6588L
RD pulse input
Status output
No
BUSY=0? Yes WR pulse input
BUSY bit confirmed
1st nibble, command input
RD pulse input
Status output
No
BUSY=0? Yes WR pulse input
BUSY bit confirmed (or wait for BUSY time)
2nd nibble, data input
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Semiconductor 2. Explanation of commands
Code DDDD 3210 0000 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1
MSM6588/6588L
Command NOP PAUSE PLAY REC START STOP SAMP CHAN ADRWR ADRRD
Function of commands (NON OPERATION) no function (PAUSE) Suspends record/playback temporarily. (PLAYBACK) Set playback mode. (RECORD) Sets recording mode. (START) Starts record/playback. (STOP) Stops record/playback. In record mode, the contents of the address counter are stored in the channel index area as the stop address. (SAMPLING FREQUENCY) Specifies the sampling frequency and control mode with the following (1) nibble. (CHANNEL) Specifies the channel and control mode with the following (1) nibble. (ADDRESS WRITE) In direct mode, stores the start address and the stop address to the channel index area with the following (8) nibbles. (ADDRESS READ) Reads out the start address and the stop address stored in the channel index area by reading of the following (8) nibbles. During this operation, the contents of the status register cannot be read.
DTRW EXT
1 1
0 0
1 1
0 1
(DATA READ WRITE) Transfers data to the external serial registers through the data bus with preset timing. (EXTERNAL) Performs record/playback by input and output of ADPCM data through the data bus by preset timing. Use this command when using SRAM or a hard disk as storage media of voice data. Does not control the external serial registers nor addresses.
VDS
1
1
0
0
(VOICE DETECT SELECT) Selects the voice triggered starting condition and the bit length of ADPCM with the following (1) nibble.
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Semiconductor Command List
Command NOP PAUSE PLAY REC START STOP SAMP 1st nibble command 0000 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 1 1 0 1 0 1 0 CSEL2 CSEL1 SA1 SA0 2nd nibble command D2 D1 D0
MSM6588/6588L
D3
Note 1 nibble command 1 nibble command 1 nibble command 1 nibble command 1 nibble command 1 nibble command 2 nibble command CSELn SAn control mode sampling freq control mode channel
CHAN
0
1
1
1
RCON
CA3
CA2
CA1
2 nibble command RCON CAn
ADRWR ADRRD DTRW EXT VDS
1 1 1 1 1
0 0 0 0 1
0 0 1 1 0
0 1 0 1 0
Inputs address data (2nd-9th nibble) Outputs address data (2nd-9th nibble)
9 nibble command 9 nibble command Transfers data by preset timing Records/plays back by preset timing
--
BIT
VD1
VD0
2 nibble command BIT ADPCM bit length starting condition VDn Voice triggered
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Semiconductor 3. Explanation of status register
MSM6588/6588L
The status register is a 4-bit register and outputs the current state to the D0 to D3 pin by input of a "L" level to the RD pin. However, the contents of the status register cannot be read during the execution of ADRRD or during record/playback by the EXT command.
D3 FULL D2 VPM D1 RPM D0 BUSY
Status register
(1) BUSY "H" level of this bit indicates that the RESET operation is in progress or a command is being processed. Do not issue commands at this time. (2) RPM This bit becomes "H" level during recording or playback. Do not issue commands except the STOP command, PAUSE command and START command after release of pause. (3) VPM This bit becomes "H" level when 1) standby for voice after voice triggered recording is started and 2) suspending recording/playback by the PAUSE command. (4) FULL This status is used for recording in a flex mode. This bit is set to a "H" level when recording is through to the end of the channel capacity which is maximum address of the serial register connected to MSM6588/6588L. It is reset when either a REC command, PLAY command or START command is input. After recording in flex mode, start recording of the next channel after confirming the FULL bit.
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Semiconductor
MSM6588/6588L
BUSY Condition After releasing RESET After input of 1 nibble command After input of 2 nibble command After input of data of 2 nibble command After input of the ADRWR command After input of address data of the ADRWR command After input of the ADRRD command After output address data of the ADRRD command After input of the DTRW command During execution of the DTRW command After input of lower 4-bit of address After input of middle 4-bit of address After input of upper 4-bit of address After input of the REC command After input of write-in data After input of the PLAY command After input of the STOP command
BUSY Stauts Bit Enable Enable Enable Enable Enable Enable Disable Disable Enable Enable Enable Enable Enable (Note 2) Enable (Note 2) Disable Enable (Note 2)
Duration of BUSY 125ms (Note 3) 16ms 16ms 16ms 270ms 50ms 270ms 50ms 16ms 16ms 16ms 270ms 16ms 50ms 50ms 50ms
Note: 1. The duration of BUSY is proportional to the period of the sampling frequency (fsamp). 2. When enabling only the data write access after input of the DTRW command, the BUSY state can be confirmed by the BUSY bit. 3. The oscillation stable time is added to the duration of BUSY after releasing RESET. The oscillation stable time is several tens of milliseconds for crystal oscillators and is several hundreds of microseconds for ceramic oscillators.
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Semiconductor 4. Selection of sampling frequency (SAMP command)
MSM6588/6588L
Data that follows the SAMP command will select the sampling frequency. The relationship between the master clock oscillation frequency (fOSC) and the sampling frequency (fsamp) is shown in the following table using data bits SA1 and SA0.
SA1 0 0 1 1 SA0 0 1 0 1 Sampling frequency (fsam) fosc / 1024 fosc / 768 fosc / 640 fosc / 512 (4.0 kHz) (5.3 kHz) (6.4 kHz) (8.0 kHz)
Note: Numbers in ( ) are for master clock frequency fOSC=4.096 MHz. 5. Recording control modes (SAMP and CHAN commands) In microcontroller interface mode, there are three record control modes. They are direct Fixed, and flex mode. Control mode selection is performed by data bit RCON of the CHAN command and data bits CSEL1 and CSEL2 of the SAMP command.
RCON 0 CSEL2 -- 0 1 0 1 1 CSEL1 -- 0 1 0 1 Number of record words 8-word 8-word 4-word 2-word 8-word Flex mode Fixed mode Control mode Direct mode
(1) Direct mode The start and stop address of each channel are input directly to the channel index area using the ADRWR command from a microcontroller. This means that the assignment of memory capacity for each channel is controlled by the microcontroller. (2) Fixed mode The start and stop address of each channel is input indirectly to the channel index area by channel selection from a microcontroller. Memory capacity of each channel is assigned by equally dividing the memory capacity of the external serial register by the number of recording words. (3) Flex mode The start and stop addresses of each channel are input indirectly to the channel index area by channel selection from a micro-controller. There is no assignment of memory capacity of each channel so that the recording time for each channel can be set arbitrarily. Refer to the Recording Control Modes on each mode description. In the meantime, since the method of re-recording for the fixed and flex modes is the same as that of the stand-alone mode, refer to Item 7, Method of re-recording for the stand-alone mode.
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Semiconductor 6. Selection of channel (CHAN command) 6.1 Channel selection in direct mode and in flex mode
CA3 0 0 0 0 1 1 1 1 CA2 0 0 1 1 0 0 1 1 CA1 0 1 0 1 0 1 0 1 Channel ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7
MSM6588/6588L
6.2 Channel selection in fixed mode
Number of recorded words
CSEL2
CSEL1
CA3 0 0 0 0 1 1 1 1 0 0 1 1 0 1
CA2 0 0 1 1 0 0 1 1 0 1 0 1 -- --
CA1 0 1 0 1 0 1 0 1 -- -- -- -- -- --
Channel ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch0 ch1 ch2 ch3 ch0 ch1
0
0
8-word
0
1
4-word
1
0
2-word
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Semiconductor
MSM6588/6588L
7. Input/output of start and stop address (ADRWR and ADRRD commands) When recording in direct mode, the start and stop address of each channel is directly input to the channel index area by the ADRWR command. The start address consists of 12bit and the stop address consists of 20bit. They denote the header and tail addresses of the channel, respectively. Start address STn
X0
X1
X2
X3
X4
X5
X6
X8
X9 X10 X11
Header address of channel Lower Upper
Stop address SPn
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X0
X1
X2
X3
X4
X5
X6
X8
X9 X10 X11
Tail Y address of channel Lower Upper Lower
Tail X address of channel Upper
The X addresses of the voice data area are 008h-FFFh (when connecting the serial register for 4Mbit). The tail Y address changes depending on the ADPCM bit length, the range that can be specified is 00h-A9h (for 3bit ADPCM) and 00h-7Fh (for 4bit ADPCM). For ordinary recording, A9h or 7Fh (tail address) should be input as the tail Y address. The ADPCM and ADRRD commands input the start and stop address after issuing the commands with the following 8 nibble data.
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Semiconductor
MSM6588/6588L
D3 1st nibble 2nd nibble 3rd nibble 4th nibble 5th nibble 6th nibble 7th nibble 8th nibble 9th nibble 1 Y3 Y7 X3 X7 X11 X3 X7 X11
D2 0 Y2 Y6 X2 X6 X10 X2 X6 X10
D1 0 Y1 Y5 X1 X5 X9 X1 X5 X9
D0 0 Y0 Y4 X0 X4 X8 X0 X4 X8
Contents ADRWR command Stop address (Y address) Stop address (X address) Start address (X address)
7.1 Input method of address data by the ADRWR command (1) After confirming the BUSY bit, input the ADRWR command. (2) After confirming the BUSY bit or waiting for the BUSY time period, input the low 4bit (Y3, Y2, Y1, Y0) of the Y stop address. This operation is to be repeated for 8 times to input the stop and start address. 7.2 Output method of address data by the ADRRD command (1) After confirming the BUSY bit, input the ADRRD command. (2) Wait for the BUSY time period and input a RD pulse to output the address data from the data bus. This operation is to be repeated for 8 times to get the stop and start address to the microcontroller. (3) After input of the ninth nibble RD pulse, the next command is enabled after waiting for the BUSY time period. During the execution of the ADRRD command, the contents of the status register cannot be confirmed. It is necessary to wait for the BUSY time period between each RD pulse.
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Semiconductor ADRWR Command Flow Chart
MSM6588/6588L
1st nibble
ADRWR command
2nd nibble
No
BUSY=0?
BUSY bit confirmed (or wait for BUSY time)
WR pulse input
Input of lower 4 address bits of Y stop address
3rd nibble
Input of upper 4 address bits of Y stop address Input of lower 4 address bits of X stop address Input of middle 4 address bits of X stop address Input of upper 4 address bits of X stop address Input of lower 4 address bits of X start address Input of middle 4 address bits of X start address
4th nibble
5th nibble
6th nibble
7th nibble
8th nibble
9th nibble
No
BUSY=0?
WR pulse input
Input of upper 4 address bits of X start address
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Semiconductor ADRRD Command Flow Chart
MSM6588/6588L
1st nibble
ADRRD command
2nd nibble
Wait for BUSY time
RD pulse input
Output of lower 4 address bits of Y stop address
3rd nibble
Output of upper 4 address bits of Y stop address Output of lower 4 address bits of X stope address Output of middle 4 address bits of X stop address Output of upper 4 address bits of X stop address Output of lower 4 address bits of X start address Output of middle 4 address bits of X start address
4th nibble
5th nibble
6th nibble
7th nibble
8th nibble
9th nibble
Wait for BUSY time
RD pulse input
Input of upper 4 address bits of X start address
Wait for BUSY time
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Semiconductor 8. Specifying ADPCM bit length (VDS command) The ADPCM bit length is specified by the VDS command data (bit).
BIT 0 1 ADPCM bit length 3-bit 4-bit
MSM6588/6588L
9. Specifying voice triggered starting mode (VDS command) Specify whether voice triggered starting is used and the voice detection level by the VDS command data bits (VD0 and VD1).
VD1 0 0 1 1 VD0 0 1 0 1 Voice detection level VVDS MSM6588 (5 V version) Voice triggered starting disabled VDD/64 (80 mV)* VDD/32 (160 mV)* VDD/16 (320 mV)* MSM6588L (3 V version) Voice triggered starting disabled VDD/128 (24 mV)** VDD/64 (48 mV)** VDD/32 (96 mV)**
* Values in parentheses are for VDD=5.12 V. ** Values in parentheses are for VDD=3.072 V. 10. Recording method 10.1 Recording in direct mode (1) Input the VDS command. Specify whether voice triggered starting is used and voice detection level using VD1 and VD0, set the ADPCM bit length by use of the BIT data. (2) Input the SAMP command. Specify the sampling frequency by SA0 and SA1 data. In direct mode, CSEL1 and CSEL2 data are ignored. (3) Input the CHAN command. Specify the channel by CA1, CA2 and CA3 data. By setting RCON data to 0, the control mode is set to the direct mode. (4) Input the start address and stop address with the ADRWR command to specify the memory area to record into. The address data is stored in the channel index area. (5) Input the REC command to set recording mode. (6) Input the START command to begin recording. At this time, the IC fetches the start address and the stop address of the specified channel from the channel index area and starts recording after storing them to the address counter and the stop address register. (7) When the contents of the address counter and the stop address register corresponds, the recording is finished. The end of recording is confirmed by the RPM bit of the status register. (8) If the recording needs to be suspended temporarily, input the STOP command. The contents of the address counter become the new stop address and are automatically stored in the channel index area. When finishing recording by the STOValues in parentheses are for VDD=5.12 V.P command, input the next command after conValues in parentheses are for VDD=5.12 V.firming that the recording operation is finished using the RPM bit. (9) If recording is to be continued, specify the condition to be modified by (1)-(4).
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Semiconductor Flowchart of Recording in Direct Mode
MSM6588/6588L
VDS command
Specification of voice triggered starting mode (VD0, VD1) and ADPCM bit length (BIT)
SAMP command
Sampling frequency (SA0, SA1) Channel (CA1, CA2, CA3) Control mode (RCON=0) Input of start address and stop address
CHAN command
ADRWR command
REC command
Set to recording mode
START command
Recording begins
No
RPM=1? Yes RPM=0? No Yes
Check for start of recording
Command input of condition to be modified
Check for end of recording
No
Stop recording? Yes STOP command Compulsory stop of recording
No
RPM=0? Yes
Check for end of recording
Yes
Continue to record? No
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Semiconductor 10.2 Recording method in the fixed and flex modes (1)
MSM6588/6588L
(2) (3) (4) (5)
(6)
(7)
(8)
(9)
Input the VDS command. Specify whether voice triggered starting is used and voice detection level with data bits VD0 and VD1. Specify the ADPCM bit length with the VDS command data (BIT). Input the SAMP command. Specify the sampling frequency with SA0 and SA1 data and control mode with CSEL1 and CSEL2 data. Input the CHAN command. Specify the channel with CA1, CA2 and CA3 data. The control mode selection data (RCON) is set to 1. Input the REC command to set the recording mode. Start recording by input of the START command. In fixed mode, recording is begun after storing the start and stop address generated inside the IC to the address counter and the stop address register respectively, and to the channel index area. In flex mode, the start address is incremented by +1 from the address of preceding channel (chn-1) fetched from the channel index area. The stop address is the last address of external serial register. Recording is begun after storing each address to the address counter, the stop address register and the channel index area. When the contents of the address counter and the stop address register corresponds, recording is finished. The end of recording is confirmed by the RPM bit of the status register. If recording is to be suspended temporarily, input the STOP command. The contents of the address counter become the new stop address and are automatically stored in the channel index area. After finishing recording using the STOP command, input the next command after confirming that the recording operation is finished using the RPM bit. In flex mode, make sure that the recording is finished to the end of the memory capacity by checking the FULL bit of the status register. If recording is completed to the end of memory, it is not possible to the next channel (chn+1). If recording is to be continued, specify the condition to be modified by (1)-(3).
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Semiconductor Flowchart of Recording in Fixed and Flex Modes
MSM6588/6588L
VDS command
Specification of voice triggered starting mode (VD0, VD1) and ADPCM bit length (BIT) Sampling frequency (SA0, SA1) Control mode (CSEL1,CSEL2) Channel (CA1, CA2, CA3) Control mode (RCON=0)
SAMP command
CHAN command
REC command
Set to recording mode
START command
Recording begins
No
RPM=1? Yes Yes
Check for start of recording
RPM=0?
Command input of condition to be modified
Check for end of recording
No No
Stop recording? Yes STOP command
Continue to record?
Compulsory halt of recording
No
RPM=0? Yes (FULL bit check) In flex mode, check if recording is through to the end of memory capacity.
Yes
Continue to record? No
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Semiconductor 11. Playback method
MSM6588/6588L
(1) Input the VDS command. Specify the ADPCM bit length using the VDS command data (BIT). VD0 and VD1 data for voice detection are invalid in playback mode. (2) Input the SAMP command. Specify the sampling frequency using SA0 and SA1 data and the control mode using CSEL1 and CSEL2 data. (3) Input the CHAN command. Specify the channel using CA1, CA2 and CA3 and specify the control mode during recording using the RCON data bit. Channel selection during playback can be specified randomly in either control mode. (4) Input the PLAY command to set playback mode. (5) Start playback by input of the START command. The IC fetches the start and stop addresses of the specified channel from the channel index area and stores each to the address counter and the stop address register to begin playback. (6) When the contents of the address counter and the stop address register corresponds, playback is finished. The end of playback is confirmed by the RPM bit of the status register. (7) If playback is to be suspended temporarily, input the STOP command. After finishing playback using the STOP command, input the next command after confirming that the recording operation is finished using the RPM bit. (8) If recording is to be continued, specify the condition to be modified by (1)-(3).
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Semiconductor Flowchart of Playback
MSM6588/6588L
VDS command
ADPCM bit length (BIT) Sampling frequency (SA0, SA1) Control mode (CSEL1, CSEL2) Channel (CA1, CA2, CA3) Control mode (RCON) Set to playback mode
SAMP command
CHAN command
PLAY command
START command
Playback begins
No
RPM=1? Yes Yes
Check for start of playback
RPM=0?
Command input of condition to be modified
Check for end of playback
No No
Stop playback? Yes STOP command
Continue to playback?
Compulsory halt of playback
No
RPM=0? Yes
Check for end of playback
Yes
Continue to playback? No
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Semiconductor 12. Pause method (temporary suspension) with the (PAUSE command)
MSM6588/6588L
Record/playback is suspended temporarily by input of the PAUSE command and is resumed by input of the START command. During pause, the VPM bit of the status register is 1 and the RPM bit is 1. Even when recording is done with voice triggered starting activated, input of the START command during pause resumes recording even in no-voice detected state. During standby for record/playback, pause, and standby for voice, the PAUSE command is invalid.
WR (I)
D0 - D3 (I/O) START command PAUSE command
START command
STOP command
Status register RPM bit VPM bit
Standby
Record/playback
Pause
Record/playback
Standby
Resumes even during recording by voice triggered starting
Input of the STOP command during pause, record/playback is finished and the IC enters standby mode.
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Semiconductor
MSM6588/6588L
WR (I)
D0 - D3 (I/O)
START command
PAUSE command
STOP command
Status register RPM bit VPM bit
Standby
Record/playback
Pause
Standby
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Semiconductor 13. Operation in voice triggered starting (VDS command)
MSM6588/6588L
By setting the VD0 and VD1 data bits of the VDS command, recording through voice triggered starting is enabled. Using voice triggered starting, it is possible to eliminate the silence data prior to the detection of voice data thus utilizing the memory capacity efficiently. However, elimination of silence data, once voice triggered recording has begun, does not occur. During standby for voice, the VPM bit of the status register is held at a 1 and is reset back to 0 when recording starts after voice is detected. The RPM bit becomes 1 after recording starts.
WR (I)
D0 - D3 (I/O) START command Voice detected Status register RPM bit VPM bit
STOP command
Standby for recording Standby for voece
Recording
Standby for recording
Input of a STOP command during standby for voice causes the IC to first finish standby for voice and then enter standby for recording.
WR (I)
D0 - D3 (I/O)
START command
STOP command
Status register RPM bit VPM bit
Standby for recording
Standby for voice
Standby for recording
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Semiconductor 14. Address control operation
MSM6588/6588L
Address control operation during record/playback is performed via the channel index area. Transfer of data with the channel index area differs depending on the control mode during recording. 14.1 Address control operation during recording 14.1.1 Direct mode recording (1) Address data is directly written to the channel index area by the ADRWR command. (2) With the input of a START command, the start and stop addresses are read from the channel index area. They are then set to the address counter and the stop address register via the address register. After this address control operation, recording is begun and the address counter counts up. (3) When recording is stopped by the STOP command, the contents of the address counter at that time are stored in the channel index area as the new stop address. 1) ADRWR Command Input
MSM6588 +1 Address controller Address counter Start address STn Address register Stop address SPn
Serial register
Channel index area
Voice data area Stop address register
2)
START Command Input (recording begins)
MSM6588 +1 Address controller Address counter Start address STn Address register Stop address SPn
Serial register
Channel index area
Voice data area Stop address register
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Semiconductor 3) STOP Command (recording stops)
MSM6588/6588L
MSM6588 Address controller
Serial register
Address counter Stop address SPn Address register
Channel index area
Voice data area Stop address register
14.1.2 Fixed mode recording (1) With the input of a START command, the start and stop address generated in the address controller is set to the address counter and the stop address register via the address register, respectively. The address data is stored in the channel index area. After this address control operation, recording is begun and the address counter counts up. (2) When the recording is stopped by the STOP command, the contents of the start address counter at that time are stored in the channel index area as the new stop address.
1)
START Command Input (recording begins)
MSM6588/6588L +1 Address controller Address counter Start address STn Address register Stop address SPn
Serial register
Channel index area
Voice data area Stop address register
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Semiconductor
MSM6588/6588L
14.1.3 Flex mode recording (1) With the input of a START command, the stop address of the preceding channel (SPn-1) is read out from the channel index area. (2) Next, address data incremented by 1 from the contents of the stop address are stored in the address counter and the channel index area as the start address (STn=SPn-1+1). The stop address generated in the address controller (the maximum address of the serial register) is set in the stop address register and is stored in the channel index area. After this operation, recording is begun and the address counter counts up. (3) When recording is finished by the STOP command, the contents of the address counter at that time are stored in the channel index area as the new stop address. 1) START Command Input
MSM6588/6588L Address controller
Serial register
Address counter
Channel index area
Address register
Stop address SPn-1 Voice data area
Stop address register
2)
Start of Recording
MSM6588/6588L +1 Address controller Address counter Start address STn (SPn-1+1) Address register Stop address SPn
Serial register
Channel index area
Voice data area Stop address register
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Semiconductor 14.2 Address control operation during playback
MSM6588/6588L
During play back, the IC performs playback using the address and stop addresses stored in the channel index area regardless of the control mode. (1) With the input of a START command, the IC first reads the start and stop address from the channel index area. They are then set to the address counter and the stop address register, respectively, through the address register. After this address control operation, playback begins and the address counter counts up. When a STOP command is input, playback is stopped. No address control operation is performed at this time. START Command Input (playback starts)
(2)
1)
MSM6588/6588L +1 Address controller Address counter Start address STn Address register Stop address SPn
Serial register
Channel index area
Voice data area Stop address register
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Semiconductor 15. Multi-channel record/playback method
MSM6588/6588L
It is possible to record/playback on multiple channels by preparing memory corresponding to the channel index area that stores the start and stop addresses of each channel inside a microcontroller or equivalent external circuit. Recording/playback of multiple channels is performed in the direct mode and the channel index area can be used as temporary address data storage. In the case of playback for the fixed message stored into the serial voice ROM, the address data of each word can be similarly stored into a ROM in a microcontroller. The following shows the procedure. 15.1 Multi-channel recording method (1) (2) (3) (4) (5) Recording conditions are specified by a command input similar to the recording method in direct method. Channels can be specific (e.g. ch0). The stop and start addresses can be written into the channel index area by the ADRWR command. Recording is started. After recording is performed, the stop address which is stored in the channel index area by the ADRRD command is read out. The stop address is stored in microcontroller memory.
15.2 Multi-channel playback method (1) (2) (3) Playback conditions are specified by a command input. The stop and start addresses that are stored in microcontroller memory are written in the channel index area by the ADRWR command. Playback is started.
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Semiconductor Flowchart to Multi-channel Recording
MSM6588/6588L
Recording condition specified by command input
Control mode is direct mode
ADRWR command
Input of start address and stop address from microcontroller
REC command
Set to recording mode
START command
Recording starts
(STOP command)
No
RPM=0? Yes ADRRD command
Recording finished?
Stop address is stored in memory of microcontroller
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Semiconductor Flowchart to Multi-channel Playback
MSM6588/6588L
Playback condition specified by command input
Control mode is direct mode
ADRWR command
Input of start address and stop address from microcontroller
PLAY command
Set to playback mode
START command
Playback starts
(STOP command)
No
RPM=0? Yes
Playback finished?
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Semiconductor 16. Playback method by means of a serial voice ROM
MSM6588/6588L
The following describes how to play a fixed message by connecting a serial voice ROM to the MSM6588/6588L. 16. 1 Circuit and memory configurations
Be sure to assign here a serial register. Assign here a serial register or serial voice ROM. MCU MSM6588 MSM6588L
000 400 800 C00
1Mbit
1Mbit
1Mbit
Address data1 Address data2 Address data3
*****
3FF CS1 CS2 CS3 CS4
CS
7FF
CS
BFF
CS
FFF
CS
Address space (X address) CS1 CS2 CS3 CS4 000h-3FFh 400h-7FFh 800h-BFFh C00h-FFFh
Serial register Assignable Assignable Assignable Assignable
Serial voice ROM Unassignable Assignable Assignable Assignable
A serial register or serial voice ROM is assigned in the unit of 1 Mbit (CSn). Note: Be sure to connect a serial register to CS1. it is impossible to connect only a serial voice ROM and use it for playback only.
1Mbit
Internal ROM
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Semiconductor
MSM6588/6588L
The following circuit configuration shows the case where 256Kbit and 2Mbit are used for playback and for a fixed playback, respectively. For playback (variable message): 256Kbit serial register MSM6586 For fixed message: 2Mbit serial voice ROM MSM6596A-XXX
MSM6596A-XXX MSM6588 000 256Kbit 0FF 100 MCU CS 1Mbit 1Mbit MSM6586 400 800 C00
3FF CS1 CS2 CS3 CS4
7FF
CS1
BFF
CS2
FFF
CS1 CS2 CS3 CS4
000h-0FFh 100h-3FFh 400h-7FFh 800h-BFFh C00h-FFFh
Serial register for variable message Unused (no addressing) Serial voice ROM for fixed message Unused (no addressing)
Serial register 256Kbit 512Kbit 1Mbit Serial voice ROM 1Mbit 2Mbit 3Mbit
MSM6586 MSM6587 MSM6389C MSM6595A-XXX MSM6596A-XXX MSM6597A-XXX
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Semiconductor 16. 2 How to contorol playback when a serial voice ROM is used. (1) ROM for saving address data
MSM6588/6588L
A start address and stop address for each word must be previously saved in the microcontroller's ROM when a serial voice ROM is used for playback. The address data is 32bit per word.
Upper X-address 12bit 12bit Lower Y-address -- 8bit
Start address Stop address
32bit per word
MCU's ROM size = 32bit number of voice words (2) Address data
Address data described in the address correspondence table are saved in the microcontroller's ROM. The following offset addresses are added to CS2 through CS4, to which a serial voice ROM is assigned.
Assigned to CS2 CS3 CS4 Offset address +400h +800h +C00h
For example, in the previous circuit, when MSM6596-600 is assigned to CS2 and CS3, and "GOZEN" GOZEN that means "morning" is voiced, the address is shown below.
Start X Stop X No.1 00 GOZEN Stop Y 0 O +400h Address to be specifiedfi 400h
10 O +400H 410h
5D O no addition 5Dh
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Semiconductor
MSM6588/6588L
(3) Flowchart to Serial Voice ROM The serial voice ROM playback differs in its playback method from the serial register playback because after specifying the channel the serial voice ROM playback requires to enter the address data that are saved in the microcontroller's ROM, using the ADRWR command. The channel index area is used temporarily. Therefore, for example, ch0 is used only for serial voice ROM playback.
VDS command
ADPCM bit length (BIT)
SAMP command
Sampling frequency (SA0,SA1) Fixed to channel (CA1,CA2,CA3) ch0 Specif the direct mode as a control mode(RCON=0).
CHAN command
PLAY command
Set to playback mode Enter address data
ADRWR command
START command
No
RPM=1?
Yes
Checking of playback start
RPM=0?
No No
Yes
Checking of playback finished
Stop playback?
Yes
STOP command
No
RPM=0?
Yes
Checking of playback finished
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Semiconductor 17. Data transfer method with external serial registers (DTRW command)
MSM6588/6588L
Data transfer can be performed with external serial registers using the DTRW command. After input of the DTRW command, the X address of the serial register for read/write is specified. Data in 4-bit nibbles are transferred from the header of the X address specified. Although the serial registers are composed of the X address times 1K-bit (Y direction), the address can be specified only in the X direction and no random address specification can be made that selects the middle of the Y direction. A single DTRW command input can do read/write operations continuously if they are in the range of the same serial register. When the operation extends to other serial registers, it is necessary to suspend the operation temporarily and re-specify the address by input of the DTRW command. The following is the DTRW command input procedure. (1) The sampling frequency is specified by input of the SAMP command. Because the access time of data transfer by the DTRW command is proportional to the period of the sampling frequency, the highest frequency is usually selected. (2) Input the DTRW command. (3) Specify the header X address of the serial register with 3 WR pulses. (4) Wait for BUSY time. Alternatively, the BUSY bit of the status register can be used to confirm this. (5) For writing data, input the data to be written with a WR pulse after input of the REC command. It is necessary to wait for BUSY time between each WR pulse. When performing data/write by a single DTRW command, the BUSY state can be checked by the BUSY bit of the status register but if data read is also performed, confirmation by the BUSY bit cannot be performed. (6) For data read, 4-bit of data are output from the data bus by input of a RD pulse, after waiting for the BUSY time, after the input of the PLAY command. For data read, confirmation of BUSY state by the BUSY bit is invalid. (7) If data read/write is to be continued, specify data transfer by read/write mode using the PLAY/REC commands. (8) If data read/write is to be terminated, input the STOP command. Wait for BUSY time and start input of the next command. If data read is performed, confirmation by the BUSY bit is invalid.
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Semiconductor Flowchart of data transfer by the DTRW command
MSM6588/6588L
SAMP command
Sampling frequency specified (Usually, the highest sampling frequency is selected.)
DTRW command Input of lower X address Input of middle X address Input of upper X address Wait for BUSY time
(X0, X1, X2, X3)
(X4, X5, X6, X7)
(X8, X9, X10, X11)
Data write?
No
Yes (Data write) (Data read) REC command PLAY command
Wait for BUSY time WR pulse input Data input to serial register
Wait for BUSY time RD pulse input Data output of serial register
Wait for BUSY time
Yes
Data read/write continue? No STOP command
Wait for BUSY time
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Semiconductor
MSM6588/6588L
18. Method of record/playback by input/output of voice data from the data bus (EXT command) When SRAM or a harddisk is used to store voice data instead of the serial registers, use the EXT command to do record/playback. During record/playback using the EXT command, voice data (ADPCM data) is directly input/ output from the data bus at the sampling frequency. There is no address control nor external serial register control at this time, therefore, it is necessary to use the microcontroller to control recording time and addresses. Pause, voice triggered starting function and selection of channels cannot be made during record/ playback. Valid commands are PLAY, REC, STOP, SAMP, VDS and EXT only. 18.1 EXT command recording method (1) (2) (3) (4) (5) (6) (7) (8) (9) The sampling frequency is specified by SA0 and SA1 data of the SAMP command. The ADPCM bit length is specified by BIT data of the VDS command. Input the REC command to set the recording mode. Input the EXT command to start recording. The sampling frequency clock is output from the MON pin. When the MON output pin becomes "H" level, input a RD pulse to fetch ADPCM data from the data bus. The upper 3bit (D3 to D1 pin) are valid for 3bit ADPCM. Store ADPCM data to external memory. Repeat steps (5) and (6) to continue recording. To stop recording input a STOP command. Recording can be continued for an indefinite period of time until the STOP command is input. As the status register cannot be checked during recording with the EXT command, it is necessary to wait for BUSY time after input of the STOP command to start input of the next command.
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Semiconductor Flowchart of recording with the EXT command
MSM6588/6588L
SAMP command
Sampling frequency specified (SA0, SA1)
VDS command
ADPCM bit length specified (BIT)
REC command EXT command
Set to recording mode
EXT recording begins
Rise of MON output pin detected RD pulse input Fetches ADPCM data
Stores ADPCM data to memory
Stores ADPCM data to external Memory
Yes
Continue recording? No STOP command EXT recording finished
Wait for BUSY time
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Semiconductor 18.2 EXT command playback method (1) (2) (3) (4) (5) (6) (7) (8)
MSM6588/6588L
Specify the sampling frequency by SA0 and SA1 data of the SAMP command. Specify the ADPCM bit length of recording by BIT data of the VDS command. Input the PLAY command to set playback mode. Input the EXT command to start playback. The sampling frequency clock is output from the MON pin. When the MON pin becomes "H", fetch ADPCM data from external memory. Input a WR pulse to get ADPCM data from the data bus. In 3bit ADPCM, the upper 3bit (D3 to D1 pin) are valid and data in the lower 1 bit (D0 pin) is invalid. Repeat steps (5) and (6) to continue playback. Input the STOP command to end playback.
Flowchart of playback by the EXT command
SAMP command
Sampling frequency specified (SA0, SA1)
VDS command
ADPCM bit length specified (BIT)
PLAY command EXT command
Set to playback mode
EXT playback begins
Rise of MON output pin detected ADPCM data is read from memory WR pulse input
Write ADPCM data
Yes
Continue Playback? No STOP command EXT playback finished
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Semiconductor 19. Reset and power down function
MSM6588/6588L
By input of a "L" level to the RESET pin, the IC stops oscillation to minimize power consumption and is set to the power down state. The control circuit is simultaneously initialized. Data specified by 2 nibble commands such as the sampling frequency, ADPCM bit length, and data in the serial registers is not affected. However, when a RESET pulse is input in the middle of record/playback, internal data and voice data become undefined and operation stops. The following shows the state of the IC at power down. (1) Oscillation is stopped and all the operations in the internal circuit are halted, the control circuit is initialized. (2) Power consumption is minimized. When using an external clock, input the GND level to the XT pin at power down so that no current is flowing to the oscillation circuit. (3) The D0 to D3-pin on the data bus are in the high-impedance state regardless of the RD and CE pins. (4) Power consumption of the external serial registers is minimized by setting the CS1 to CS4 pin to a "H" level output. (5) The state of the output pins are as follows: SAD, SAS, TAS, CS1~CS4, WE, RWCK, STBY pins ........... "H" level output MON pin ................................................................................... "L" level output DI/O pin ................................................................................... High-impedance AOUT, FOUT pins................................................................... GND level output
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Semiconductor
MSM6588/6588L
APPLICATION CIRCUITS
Figure 1 shows an application circuit when the MSM6588/6588L is used in stand-alone mode and four 1Mbit serial registers are used. Figure 2 shows an application circuit when the MSM6588/6588L is used in microcontroller interface mode with two 1Mbit serial registers and one 2Mbit serial voice ROM. Figure 3 shows an example of application circuit when record/playback is made using the EXT command for MSM6588/6588L.
VCC
MSM6389C
VCC
MSM6389C
VCC
MSM6389C
CS VSS
CS VSS
CS VSS
1Mbit Serial Register
TEST TEST FAM RFSH RS/A CS VSS
SAD SAS TAS RWCK WE DIN DOUT
4.096MHz
MSM6389C
SAD SAS TAS RWCK WE DI/O
MON XT XT
AOUT
AVDD
CS1 CS2 CS3 CS4
DGND
Speaker amplifier
VCC
DVDD'
MSM6588/6588L
REC/PLAY
PAUSE
RSEL1 RSEL2 SAM PDMD MCUM VDS
RESET
MOUT
SP
ST
DGND
+
AVDD
+
LOUT AMON FIN FOUT ADIN SG DGND
CSEL1
CSEL2 CA1 CA2 CA3 MIN
DVDD
LIN
AGND
Switch array
FIgure 1 Example of Application Circuit in Stand-alone Mode with 1Mbit Serial Registers 97/101
AGND
+
DVDD
DVDD' AVDD
VCC VCC SADX SASX TAS RWCK DOUT SASY SADY VCC SAD SAS TAS RWCK WE DIN DOUT
1Mbit Serial Register MSM6389C MSM6389C
Semiconductor
D3 D2 D1 D0 RD WR CE
MSM6588/6588L
SAD SAS TAS RWCK WE DI/O
2Mbit Serial Voice ROM MSM6596A-xxx
Microcontroller
MCUM TEST RSEL1 RSEL2 TEST TEST TEST TEST TEST TEST FAM FRSH RS/A CS VSS CS RESET CS1 CS2 CS3 CS4
VSS
TEST CS1 CS2 VSS
+
MIN MOUT LIN AOUT
MON XT XT
4.096MHz DGND
Speaker amplifier
Figure 2 Example of Application Circuit in Microcontroller Interface Mode with 1Mbit Serial Registers and 2Mbit Serial Voice ROM
AVDD
+ +
LOUT AMON FIN FOUT ADIN SG DGND
AGND
MSM6588/6588L
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AGND
Semiconductor
MSM6588/6588L
Microcontroller Control Circuit
External Memory
MCUM TEST RSEL1 RSEL2 TEST TEST TEST TEST RESET
MSM6588/6588L
DVDD DVDD' AVDD SAD D3 SAS D2 TAS D1 RWCK D0 WE RD DI/O WR CE MON Open
Microcontroller
CS1 CS2 CS3 CS4
+
MIN MOUT LIN LOUT AMON FIN FOUT ADIN SG DGND AOUT Speaker amplifier XT XT 4.096MHz
DGND
AVDD + + AGND
AGND
Figure 3 Application Circuit When Record/Playback is Mode Using EXT Command
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Semiconductor
MSM6588/6588L
PACKAGE DIMENSIONS
(Unit : mm) QFP44-P-910-0.80-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.41 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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Semiconductor
MSM6588/6588L
(Unit : mm)
TQFP44-P-1010-0.80-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.28 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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